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P9221-R_17 Datasheet, PDF (3/35 Pages) Integrated Device Technology – Wireless Power Receiver for 15W Applications
P9221-R Datasheet
13. Package Drawings......................................................................................................................................................................................32
14. Recommended Land Pattern......................................................................................................................................................................33
15. Special Notes: AHG52 WLCSP-52 Package Assembly .............................................................................................................................34
16. Marking Diagram ........................................................................................................................................................................................34
17. Ordering Information...................................................................................................................................................................................34
18. Revision History..........................................................................................................................................................................................35
List of Figures
Figure 1. Pin Assignments..................................................................................................................................................................................5
Figure 2. Efficiency vs. Output Load: VOUT = 12V .............................................................................................................................................12
Figure 3. Load Reg. vs. Output Load: VOUT = 12V ............................................................................................................................................12
Figure 4. Efficiency vs. Output Load: VOUT = 9V ...............................................................................................................................................12
Figure 5. Load Reg. vs. Output Load: VOUT = 9V ..............................................................................................................................................12
Figure 6. Efficiency vs. Output Load: VOUT = 5V ...............................................................................................................................................12
Figure 7. Load Reg. vs. Output Load: VOUT = 5V ..............................................................................................................................................12
Figure 8. Rectifier Voltage vs. Load: VOUT = 12V ..............................................................................................................................................13
Figure 9. Rectifier Voltage vs. Load: VOUT = 9V ................................................................................................................................................13
Figure 10. Rectifier Voltage vs. Load: VOUT = 5V ................................................................................................................................................13
Figure 11. Current Limit vs. VILIM ........................................................................................................................................................................13
Figure 12. X and Y Misalignment........................................................................................................................................................................13
Figure 13. Max. Power vs. Misalignment: VOUT=12V ..........................................................................................................................................13
Figure 14. Enable Startup: VOUT = 12V; IOUT = 1.2A ............................................................................................................................................14
Figure 15. Transient Resp: VOUT = 12V; IOUT = 0 to 1.2A ....................................................................................................................................14
Figure 16. Transient Resp: VOUT = 12V; IOUT = 1.3A to 0 ....................................................................................................................................14
Figure 17. Functional Block Diagram..................................................................................................................................................................15
Figure 18. Example of Differential Bi-phase Decoding for FSK ..........................................................................................................................20
Figure 19. Example of Asynchronous Serial Byte Format for FSK .....................................................................................................................20
Figure 20. Bit Encoding Scheme ........................................................................................................................................................................21
Figure 21. Byte Encoding Scheme .....................................................................................................................................................................21
Figure 22. Communication Packet Structure ......................................................................................................................................................21
Figure 23. WPC Power Transfer Phases Flowchart ...........................................................................................................................................22
Figure 24. P9221-R Typical Application Schematic............................................................................................................................................30
Figure 25. Package Outline Drawing ..................................................................................................................................................................32
Figure 26. AHG52 52-WLCSP Land Pattern ......................................................................................................................................................33
© 2017 Integrated Device Technology, Inc.
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April 4, 2017