IDT74ALVCH32373 Datasheet, PDF (3/7 Pages) Integrated Device Technology – 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD

IDT74ALVCH32373
3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Symbol
Description
Max
Unit
VTERM⁽²⁾ Terminal Voltage with Respect to GND –0.5 to +4.6
V
VTERM⁽³⁾ Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
VI < 0 or VI > VCC
±50
mA
IOK
Continuous Clamp Current, VO < 0
–50
mA
ICC
Continuous Current through each
ISS
VCC or GND
±100
mA
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter⁽¹⁾
Conditions Typ. Max. Unit
CIN
Input Capacitance
VIN = 0V
5
7
pF
COUT
Output Capacitance VOUT = 0V
7
CI/O
I/O Port Capacitance VIN = 0V
7
9
pF
9
pF
NOTE:
1. As applicable to the device type.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
PIN DESCRIPTION
Pin Names
xDx
xLE
xQx
xBx
Description
Data Inputs⁽¹⁾
Latch Enable Inputs
3-State Outputs
3-State Output Enable Input (Active LOW)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTION TABLE (EACH 8-BIT SECTION)⁽¹⁾
Inputs
Outputs
xOE
xAx
xDx
xQx
L
H
H
H
L
H
L
L
L
L
X
Q⁽²⁾
H
X
X
Z
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
2. Output level of Q before the indicated steady-state conditions were established.
3