5P49V6914 Datasheet, PDF (29/37 Pages) Integrated Device Technology – Programmable Clock Generator

5P49V6914 DATASHEET
LVDS Driver Termination
For a general LVDS interface, the recommended value for the
termination impedance (Z_T) is between 90. and 132. The
actual value should be selected to match the differential
impedance (Zo) of your transmission line. A typical
point-to-point LVDS design uses a 100 parallel resistor at the
receiver and a 100. differential transmission-line
environment. In order to avoid any transmission-line reflection
issues, the components should be surface mounted and must
be placed as close to the receiver as possible. The standard
termination schematic as shown in figure Standard
Termination or the termination of figure Optional Termination
can be used, which uses a center tap capacitance to help filter
common mode noise. The capacitor value should be
approximately 50pF. In addition, since these outputs are LVDS
compatible, the input receiver's amplitude and common-mode
input range should be verified for compatibility with the IDT
LVDS output. If using a non-standard termination, it is
recommended to contact IDT and confirm that the termination
will function as intended. For example, the LVDS outputs
cannot be AC coupled by placing capacitors between the
LVDS outputs and the 100 ohm shunt load. If AC coupling is
required, the coupling caps must be placed between the 100
ohm shunt termination and the receiver. In this manner the
termination of the LVDS output remains DC coupled.
LVDS
Driver
Z_O  Z_T
Standard Termination
Z_T
LVDS
Receiver
LVDS
Driver
Z_O  Z_T
Optional Termination
Z_T
2 _LVDS
C
Z_{T Receiver}
2
NOVEMBER 11, 2016
29
PROGRAMMABLE CLOCK GENERATOR