IDT82P2288_08 Datasheet, PDF (274/362 Pages) Integrated Device Technology – Octal T1/E1/J1 Long Haul / Short Haul Transceiver

IDT82P2288
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
E1 FRMR Interrupt Indication 0 (052H, 152H, 252H, 352H, 452H, 552H, 652H, 752H)
Bit No.
Bit Name
Type
Default
7
6
Reserved
5
EXCRCERI
R
0
4
C2NCIWI
R
0
3
OOSMFI
R
0
2
OOCMFI
R
0
1
OOOFI
R
0
0
OOFI
R
0
EXCRCERI:
When CRC Multi-Frame is synchronized, once the accumulated CRC-4 errors are not less than 915 (≥915) in a 1 second fixed window, an exces-
sive CRC-4 error event is generated. During out of CRC Multi-Frame synchronization state, the Excessive CRC-4 Error detection is suspended.
= 0: No Excessive CRC-4 Error event is detected.
= 1: The Excessive CRC-4 Error event is detected.
This bit will be cleared if a ’1’ is written to it.
C2NCIWI:
= 0: There is no status change on the C2NCIWV bit (b4, E1-04FH,...).
= 1: There is a transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the C2NCIWV bit (b4, E1-04FH,...).
This bit will be cleared if a ’1’ is written to it.
OOSMFI:
= 0: There is no status change on the OOSMFV bit (b3, E1-04FH,...).
= 1: There is a transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the OOSMFV bit (b3, E1-04FH,...).
This bit will be cleared if a ’1’ is written to it.
OOCMFI:
= 0: There is no status change on the OOCMFV bit (b2, E1-04FH,...).
= 1: There is a transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the OOCMFV bit (b2, E1-04FH,...).
This bit will be cleared if a ’1’ is written to it.
OOOFI:
= 0: There is no status change on the OOOFV bit (b1, E1-04FH,...).
= 1: There is a transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the OOOFV bit (b1, E1-04FH,...).
This bit will be cleared if a ’1’ is written to it.
OOFI:
= 0: There is no status change on the OOFV bit (b0, E1-04FH,...).
= 1: There is a transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the OOFV bit (b0, E1-04FH,...).
This bit will be cleared if a ’1’ is written to it.
Programming Information
274
March 04, 2009