IDT5P49EE601 Datasheet, PDF (25/26 Pages) Integrated Device Technology – VERSACLOCK® LOW POWER CLOCK GENERATOR

IDT5P49EE601
VERSACLOCK^® LOW POWER CLOCK GENERATOR
EEPROM CLOCK GENERATOR
Revision History
Rev.
--
A
B
C
Originator
R.Willner
R.Willner
R.Willner
R.Willner
Date Description of Change
10/29/09 Preliminary Datasheet release.
11/20/09 No_PD bit inclusion - 32kHz clock on/off in Config 00.
3/25/10 Typographical changes. Correct spread spectrum calculations.
6/11/10 Typographical changes. Default configuration.
IDT™ VERSACLOCK^® LOW POWER CLOCK GENERATOR
25
IDT5P49EE601 REV C 061110