IDT72V73263 Datasheet, PDF (24/36 Pages) Integrated Device Technology – 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH WITH RATE MATCHING 16,384 X 16,384 CHANNELS

IDT72V73263 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH WITH RATE MATCHING 16,384 x 16,384 CHANNELS
INDUSTRIAL TEMPERATURE RANGE
JTAG SUPPORT
The IDT72V73263 JTAG interface conforms to the Boundary-Scan standard
IEEE-1149.1. This standard specifies a design-for-testability technique called
Boundary-Scan test (BST). The operation of the boundary-scan circuitry is
controlled by an external test access port (TAP) Controller.
TEST ACCESS PORT (TAP)
The Test Access Port (TAP) provides access to the test functions of the
IDT72V73263. It consists of three input pins and one output pin.
•Test Clock Input (TCK)
TCK provides the clock for the test logic. The TCK does not interfere with any
on-chip clock and thus remains independent. The TCK permits shifting of test
data into or out of the Boundary-Scan register cells concurrently with the
operation of the device and without interfering with the on-chip logic.
•Test Mode Select Input (TMS)
The logic signals received at the TMS input are interpreted by the TAP
Controller to control the test operations. The TMS signals are sampled at the
rising edge of the TCK pulse. This pin is internally pulled to VCC when it is not
driven from an external source.
•Test Data Input (TDI)
Serial input data applied to this port is fed either into the instruction register or
into a test data register, depending on the sequence previously applied to the
TMS input. Both registers are described in a subsequent section. The received
input data is sampled at the rising edge of TCK pulses. This pin is internally pulled
to VCC when it is not driven from an external source.
•Test Data Output (TDO)
Depending on the sequence previously applied to the TMS input, the contents
of either the instruction register or data register are serially shifted out through
the TDO pin on the falling edge of each TCK pulse. When no data is shifted
through the boundary scan cells, the TDO driver is set to a High-Impedance
state.
•Test Reset (TRST)
Reset the JTAG scan structure. This pin is internally pulled to VCC when it
is not driven from an external source.
INSTRUCTION REGISTER
In accordance with the IEEE-1149.1 standard, the IDT72V73263 uses public
instructions. The IDT72V73263 JTAG interface contains a four-bit instruction
register. Instructions are serially loaded into the instruction register from the TDI
when the TAP Controller is in its shift-IR state. Subsequently, the instructions are
decoded to achieve two basic functions: to select the test data register that may
operate while the instruction is current, and to define the serial test data register
path, which is used to shift data between TDI and TDO during data register
scanning. See Table 12 for Instruction decoding.
TEST DATA REGISTER
As specified in IEEE-1149.1, the IDT72V73263 JTAG Interface contains two
test data registers:
•The Boundary-Scan register
The Boundary-Scan register consists of a series of Boundary-Scan cells
arranged to form a scan path around the boundary of the IDT72V73263 core
logic.
•The Bypass Register
The Bypass register is a single stage shift register that provides a one-bit path
from TDI to TDO. The IDT72V73263 boundary scan register bits are shown
in Table 14. Bit 0 is the first bit clocked out. All three-state enable bits are active
HIGH.
ID CODE REGISTER
As specified in IEEE-1149.1, this instruction loads the IDR with the Revision
Number, Device ID, JEDEC ID, and ID Register Indicator Bit. See Table 10.
TABLE 17 — IDENTIFICATION REGISTER DEFINITIONS
INSTRUCTION FIELD
VALUE
DESCRIPTION
Revision Number (31:28)
0x0
Reserved for version number
IDT Device ID (27:12)
0x0430
Defines IDT part number
IDT JEDEC ID (11:1)
0x33
Allows unique identification of device vendor as IDT
ID Register Indicator Bit (Bit 0)
1
Indicates the presence of an ID register
TABLE 18 — SCAN REGISTER SIZES
REGISTER NAME
Instruction (IR)
Bypass (BYR)
BIT SIZE
4
1
Identification (IDR)
32
Boundary Scan (BSR)
Note(1)
NOTE:
1. The Boundary Scan Descriptive Language (BSDL) file for this device is available on
the IDT website (www.idt.com), or by contacting your local IDT sales representative.
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