ADC1212D Datasheet, PDF (24/40 Pages) NXP Semiconductors – Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs

Integrated Device Technology
ADC1212D series
Dual 12-bit ADC: CMOS or LVDS DDR digital outputs
Sine
clock input
CLKP
CLKM
Sine
clock input
CLKP
CLKM
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a. Sine clock input
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b. Sine clock input (with transformer)
LVPECL
clock input
CLKP
CLKM
c. LVPECL clock input
Fig 27. Differential clock input
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11.4.2 Equivalent input circuit
The equivalent circuit of the input clock buffer is shown in Figure 28. The common-mode
voltage of the differential input stage is set via internal 5 k resistors.
Package
ESD
Parasitics
CLKP
CLKM
V_cm(clk)
SE_SEL SE_SEL
5 kΩ
5 kΩ
V_cm(clk) = common-mode voltage of the differential input stage
Fig 28. Equivalent input circuit
ADC1212D_SER 3
Product data sheet
Rev. 03 — 2 July 2012
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© IDT 2012. All rights reserved.
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