5P49V5943_16 Datasheet, PDF (24/33 Pages) Integrated Device Technology – Programmable Clock Generator

5P49V5943 DATASHEET
Vbias
Zo=50ohm
Zo=50ohm
C1
0.1µF
Rpu1
Rterm
100ohm
C2
0.1µF
LVDS Driver
R1
4.7kohm
Rpu2
CLKIN
CLKINB
VersaClock 5 Receiver
R2
4.7kohm
CLKIN, CLKINB Input Driven by an LVDS Driver
Table 24: Bias Resistors for 3.3V LVPECL and LVDS Drive to CLKIN/B
Vbias
(V)
3.3
2.5
1.8
Rpu1/2
(kohm)
22
15
10
CLKIN/B Bias Voltage
(V)
0.58
0.60
0.58
2.5V Differential LVPECL Clock Input Interface
The maximum DC 2.5V LVPECL voltage meets the VIH max
CLKIN requirement. Therefore 2.5V LVPECL can be
connected directly to the CLKIN terminals without AC coupling
+2.5V LVPECL
Driver
Zo=50ohm
Zo=50ohm
R1
50ohm
CLKIN
CLKINB
R2
50ohm
Versaclock 5 Receiver
RTT
18ohm
CLKIN, CLKINB Input Driven by a 2.5V LVPECL Driver
PROGRAMMABLE CLOCK GENERATOR
24
NOVEMBER 11, 2016