IDT5V9885 Datasheet, PDF (22/37 Pages) Integrated Device Technology – 3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR

IDT5V9885
3.3V EEPROM PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
PROGRAMMING THE DEVICE
I²C and JTAG may be used to program the 5V9885. The I²C/JTAG pin selects the I²C when HIGH and JTAG when LOW. Note that the TRST pin needs
to be LOW for I²C mode.
Hardwired Parameters for the IDT5V9885
JTAG identification number = 32'b0000_0000001110101100_00000110011_1
Device (slave) address = 7'b1101010
ID Byte for the 5V9885 = 8'b00010000
I²C PROGRAMMING
The 5v9885 is programmed through an I²C-Bus serial interface, and is an I²C slave device. The read and write transfer formats are supported. The first
byte of data after a write frame to the correct slave address is interpreted as the register address; this address auto-increments after each byte written or read.
The frame formats are shown below.
SDA
SDA
SCL
S
Start
Condition
Data Frame
Data is stable during
clock HIGH
Figure 1: Framing
SCL
P
Stop
Condition
Each frame starts with a "Start Condition" and ends with an "End Condition". These are both generated by the Master device.
MSB
LSB
1101010
R/W
7-bit slave address
R/W
0 - Slave will be written by master
1 - Slave will be read by master
ACK from Slave
The first byte transmitted by the Master is the Slave Address followed by the R/W bit.
The Slave acknowledges by sending a "1" bit.
Figure 2: First Byte Transmittetd on I²C Bus
22