ICS853111-01 Datasheet, PDF (2/15 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-3.3V LVPECL/ECL FANOUT BUFFER

ICS853111-01
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-3.3V LVPECL/ECL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
V_CC
Power
Core supply pin.
2
nPCLK
Input
Pullup/
Pulldown¹
Inverting differential LVPECL clock input. Bias to V_CC/2 w/no input.
3
4, 27
V_BB
Output
nc
Unused
Bias voltage.
No connect.
5, 6
nQ8, Q8 Output
Differential output pair. LVPECL interface levels.
7, 9
nQ7, Q7 Output
Differential output pair. LVPECL interface levels.
8, 15, 22
10, 11
V
CCO
Power
nQ6, Q6 Output
Output supply pins.
Differential output pair. LVPECL interface levels.
12, 13
nQ5, Q5 Output
Differential output pair. LVPECL interface levels.
14, 16
nQ4, Q4 Output
Differential output pair. LVPECL interface levels.
17, 18
nQ3, Q3 Output
Differential output pair. LVPECL interface levels.
19, 20
nQ2, Q2 Output
Differential output pair. LVPECL interface levels.
21, 23
nQ1, Q1 Output
Differential output pair. LVPECL interface levels.
24, 25
nQ0, Q0 Output
Differential output pair. LVPECL interface levels.
26
V_EE
Power
Negative supply pin.
28
PCLK Input Pulldown Non-inverting differential LVPECL clock input.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R_PULLDOWN
R¹
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
50
75
50
Maximum
1
Units
pF
KΩ
KΩ
KΩ
853111AV-01
2
REV. A NOVEMBER 14, 2007