ICS8530-01 Datasheet, PDF (2/17 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

ICS8530-01 Data Sheet
LOW SKEW, 1-TO-16, DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
Table 1. Pin Descriptions
Number
1, 11, 14, 24, 25, 35, 38, 48
2, 3
4, 5
6, 19, 30, 43
7, 8
9, 10
12, 13
15, 16
17, 18
20, 21
22, 23
26, 27
28, 29
31, 32
33, 34
36
37
39, 40
41, 42
44, 45
46, 47
Name
V_CCO
Q11, nQ11
Q10, nQ10
V_EE
Q9, nQ9
Q8, nQ8
V_CC
Q7, nQ7
Q6, nQ6
Q5, nQ5
Q4, nQ4
Q3, nQ3
Q2, nQ2
Q1, nQ1
Q0, nQ0
CLK
nCLK
Q15, nQ15
Q14, nQ14
Q13, nQ13
Q12, nQ12
Type
Power
Output
Output
Power
Output
Output
Power
Output
Output
Output
Output
Output
Output
Output
Output
Input
Pulldown
Input
Pullup
Output
Output
Output
Output
Description
Output supply pins.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Negative supply pins.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Power supply pins.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Non-inverting differential clock input.
Inverting differential clock input.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
C_IN
R_PULLUP
R_PULLDOWN
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
3
51
51
Maximum
Units
pF
k
k
ICS8530FY-01 REVISION G NOVEMBER 15, 2012
2
©2012 Integrated Device Technology, Inc.