ICS83058I Datasheet, PDF (2/14 Pages) Integrated Circuit Systems – 8:1, SINGLE-ENDED MULTIPLEXER

ICS83058I
8:1, SINGLE-ENDED MULTIPLEXER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
Q
Output
Single-ended clock output. LVCMOS/LVTTL interface levels.
2, 4, 6,
8, 9, 11,
13, 15
3
CLK7, CLK6, CLK5,
CLK4, CLK3, CLK2,
CLK1, CLK0
OE
Input
Input
Pulldown Single-ended clock inputs. LVCMOS/LVTTL interface levels.
Pullup
Output enable. When LOW, outputs are in HIGH impedance state.
When HIGH, outputs are active. LVCMOS / LVTTL interface levels.
5
GND
Power
Power supply ground.
7, 10, 14 SEL2, SEL1, SEL0
Input
Pulldown
Clock select input. See Control Input Function Table.
LVCMOS / LVTTL interface levels.
12
V
Power
Core and input supply pin.
DD
16
V_DDO
Power
Output supply pin.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R
PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
C
PD
Power Dissipation Capacitance
(per output)
R
OUT
Output Impedance
Test Conditions
V_DDO = 3.465V
V = 2.625V
DDO
V_DDO = 1.89V
V_DDO = 3.465V
V = 2.625V
DDO
V_DDO = 1.89V
Minimum
Typical
4
51
51
18
20
30
7
7
10
Maximum
Units
pF
kΩ
kΩ
pF
pF
pF
Ω
Ω
Ω
TABLE 3. CONTROL INPUT FUNCTION TABLE
SEL2
0
0
0
0
1
1
1
1
Control Inputs
SEL1
0
0
1
1
0
0
1
1
SEL0
0
1
0
1
0
1
0
1
Input Selected to Q
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
IDT^™ / ICS^™ 8:1, SINGLE-ENDED MULTIPLEXER
2
ICS83058AGI REV. C MARCH 10, 2008