English
Language : 

5P49V5927_16 Datasheet, PDF (18/27 Pages) Integrated Device Technology – Programmable Clock Generator
5P49V5927 DATASHEET
Test Circuits and Loads
VDDOx
VDDD
VDDA
0.1µF 0.1µF 0.1µF
OUTx
CL
CLKOUT
GND
Test Circuits and Loads for Outputs
Typical Phase Noise at 100MHz (3.3V, 25°C)
NOTE: All outputs operational at 100MHz, Phase Noise Plot with Spurs On.
PROGRAMMABLE CLOCK GENERATOR
18
NOVEMBER 11, 2016