IDT723631_14 Datasheet, PDF (16/20 Pages) Integrated Device Technology – CMOS SyncFIFO

IDT723631/723641/723651 CMOS SyncFIFO™
512 x 36, 1,024 x 36 and 2,048 x 36
CLKA
ENA
AF
tENS1
tENH1
tPAF
[Depth ⁽²⁾-(Y+1)] Words in FIFO
(1)
tSKEW2
1
(2)
(Depth -Y) Words in FIFO
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
2
tPAF
CLKB
ENB
tENS1
tENH1
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NOTES:
1. tSKEW2 is the minimum time between a rising CLKA edge and a rising CLKB edge for AF to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge
and rising CLKA edge is less than tSKEW2, then AF may transition HIGH one CLKA cycle later than shown.
2. Depth is 512 for the IDT723631, 1,024 for the IDT723641, and 2,048 for the IDT723651.
3. FIFO write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO read (CSB = LOW, W/RB = HIGH, MBB = LOW).
Figure 10. Timing for AF when FIFO is Almost-Full
CLKB
ENB
RTM
RFM
tENS1
tRMS
tENH1
tRMH
tRMS
tRMS
tRMH
tRMH
OR
B0-B35
HIGH
tA
W0
Initiate Retransmit Mode
with W0 as First Word
tA
W1
tA
W2
Retransmit from
Selected Position
tA
W0
End Retransmit
Mode
W1
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NOTE:
1. CSB = LOW, W/RB = HIGH, MBB = LOW. No input enables other than RTM and RFM are needed to control retransmit mode or begin a retransmit. Other enables are shown
only to relate retransmit operations to the FIFO output register.
Figure 11. Retransmit Timing Showing Minimum Retransmit Length
CLKB
1
2
RTM HIGH
tRMS
tRMH
RFM
AE
X or fewer words from Empty
NOTE:
1. X is the value loaded in the Almost-Empty flag Offset register.
tPAE
(X+1) or more
words from Empty
Figure 12. AE Maximum Latency When Retransmit Increases the Number of Stored Words Above X.
16
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