ICSSSTUAF32868B Datasheet, PDF (13/22 Pages) Integrated Device Technology – 28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

ICSSSTUAF32868B
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
COMMERCIAL TEMPERATURE GRADE
DC Electrical Characteristics Over Operating Range
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = 0°C to +70°C, VDDQ/VDD = 2.5V ± 0.2V.
Symbol Parameter
Test Conditions
VOH Output HIGH Voltage IOH = -6mA, VDDQ = 1.7V
VOL Output LOW Voltage IOL = 6mA, VDDQ = 1.7V
IIL All Inputs
VI = VDD or GND; VDD = 1.9V
Static Standby
IO = 0, VDD = 1.9V, RESET = GND
IDD
Static Operating
IO = 0, VDD = 1.9V, RESET = VDD, VI =
VIH(AC) or VIL(AC), CLK = CLK = VIH(AC)
or VIL(AC)
IO = 0, VDD = 1.9V, RESET = VDD, VI =
VIH(AC) or VIL(AC), CLK = VIH(AC), CLK =
VIL(AC)
Dynamic Operating
(clock only)
IO = 0, VDD = 1.8V, RESET = VDD, VI =
VIH(AC) or VIL(AC), CLK and CLK
switching 50% duty cycle
IDDD
Dynamic Operating
(per each data input)
1:2 mode
IO = 0, VDD = 1.8V, RESET = VDD, VI =
VIH(AC) or VIL(AC), CLK and CLK
switching 50% duty cycle. One data
input switching at half clock frequency,
50% duty cycle.
Data Inputs
VI = VREF ± 250mV
CI CLK and CLK
VICR = 0.9V, VIPP = 600mV
RESET
VI = VDD or GND
Min.
1.2
-5
2
2.5
Typ.
200
500
44
5
Max.
0.5
+5
200
Units
V
V
μA
μA
10
mA
μA/Clock
MHz
μA/Clock
MHz/
Data
3.5
4
pF
28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
13
ICSSSTUAF32868B
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