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ICS8741004_1 Datasheet, PDF (12/19 Pages) Integrated Device Technology – DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS™ JITTER ATTENUATOR | |||
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ICS8741004
DIFFERENTIAL-TO-LVDS/0.7V DIFFERENTIAL PCI EXPRESS⢠JITTER ATTENUATOR
Recommendations for Unused Input and Output Pins
Inputs:
LVCMOS Control Pins
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k⦠resistor can be used.
Outputs:
Differential Outputs
All unused differential outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
LVDS Outputs
All unused LVDS output pairs can be either left floating or
terminated with 100⦠across. If they are left floating, we
recommend that there is no trace attached.
LVDS Driver Termination
A general LVDS interface is shown in Figure 4. In a 100â¦
differential transmission line environment, LVDS drivers require a
matched load termination of 100⦠across near the receiver input.
For a multiple LVDS outputs buffer, if only partial outputs are used,
it is recommended to terminate the unused outputs.
3.3V
LVDS Driver
3.3V
50â¦
+
R1
100â¦
â
50â¦
100⦠Differential Transmission Line
Figure 4. Typical LVDS Driver Termination
IDT⢠/ ICS⢠PCI EXPRESS⢠JITTER ATTENUATOR
12
ICS8741004AG REV. ANOVEMBER 1, 2007
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