ICS8545I Datasheet, PDF (12/15 Pages) Integrated Device Technology – LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER

ICS8545I
LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
Reliability Information
Table 7. θ_JA vs. Air Flow Table for a 20 Lead TSSOP
θ_JA by Velocity
Linear Feet per Minute
0
Single-Layer PCB, JEDEC Standard Test Boards
114.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
73.2°C/W
Transistor Count
The transistor count for ICS8545I is: 644
200
98.0°C/W
66.6°C/W
500
88.0°C/W
63.5°C/W
Package Outline and Package Dimensions
Package Outline - G Suffix for 20 Lead TSSOP
Table 8. Package Dimensions
All Dimensions in Millimeters
Symbol Minimum Maximum
N
20
A
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
6.40
6.60
E
6.40 Basic
E1
4.30
4.50
e
0.65 Basic
L
0.45
0.75
α
0°
8°
aaa
0.10
Reference Document: JEDEC Publication 95, MO-153
IDT™ / ICS™ LVDS FANOUT BUFFER
12
ICS8545BGI REV. B MARCH 02, 2009