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| ICS8440258-46 Datasheet, PDF (11/16 Pages) Integrated Device Technology – FEMTOCLOCK™ CRYSTAL/LVCMOS-TOLVDS/LVCMOS FREQUENCY SYNTHESIZER | |||
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ICS8440258-46
FEMTOCLOCK⢠CRYSTAL/LVCMOS-TO-LVDS/ LVCMOS FREQUENCY SYNTHESIZER
POWER CONSIDERATIONS
PRELIMINARY
This section provides information on power dissipation and junction temperature for the ICS8440258-46.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS840258-46 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V = 2.5V + 5% = 2.625V, which gives worst case results.
DD
Core and LVDS Output Power Dissipation
⢠Power (core, LVDS) = V * (I + I + I + I ) = 2.625V * (170mA + 13mA) = 480.4mW
DD_MAX
DD
DDO1
DDO2
DDA
LVCMOS Output Power Dissipation
⢠Output Impedance R Power Dissipation due to Loading 50Ω to V /2
OUT
DDO
Output Current IOUT = VDDO_MAX / [2 * (50Ω + ROUT)] = 2.625V / [2 * (50Ω + 12Ω)] = 21.2mA
⢠Power Dissipation on the ROUT per LVCMOS output
Power (ROUT) = ROUT * (IOUT)2 = 12Ω * (21.2mA)2 = 5.4mW per output
⢠Total Power Dissipation on the ROUT
Total Power (ROUT) = 5.4mW * 4 = 21.6mW
⢠Dynamic Power Dissipation at 125MHz
Power (125MHz) = CPD * Frequency * (VDDO)2 = 8pF * 125MHz * (2.625V)2 = 6.9mW per output
Total Power (125MHz) = 6.9mW * 2 = 13.8mW
⢠Dynamic Power Dissipation at 25MHz
Power (25MHz) = CPD * frequency * (VDDO)2 = 8pF * 25MHz * (2.625V)2 = 1.4 mW per output
Total Power (25MHz) = 1.4mW * 2 = 2.8mW
Total Power Dissipation
⢠Total Power
= Power (core, LVDS) + Total Power (R ) + Total Power (125MHz) + Total Power (25MHz)
OUT
= 480.4mW + 21.6mW + 13.8mW + 2.8mW
= 518.6mW
IDT⢠/ ICS⢠LVDS/LVCMOS FREQUENCY SYNTHESIZER
11
ICS8440258AK-46 REV B JANUARY 15, 2008
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