QS5930T Datasheet, PDF (1/6 Pages) Integrated Device Technology – LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER

QS5930T
LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
LOW SKEW CMOS PLL
CLOCK DRIVER WITH
INTEGRATED LOOP FILTER
INDUSTRIAL TEMPERATURE RANGE
QS5930T
FEATURES:
• 5V operation
• Q/2 output, 5 Q outputs
• Useful for Pentium, PowerPC, and PCI systems
• Internal loop filter RC network
• Low noise TTL level outputs
• <250ps rising edge output skew
• Balanced drive outputs ±24mA
• PLL bypass feature for low frequency testing
• Internal VCO/2 option for wider frequency range
• Outputs tri-state and reset while OE/RST is low
• ESD > 2000V
• Latch up > -300mA
• Available in QSOP package
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The QS5930T Clock Driver uses an internal phase locked loop
(PLL) to lock low skew outputs to a reference clock input. Six outputs
are available: Q0–Q4, Q/2. Careful layout and design ensure < 250ps
skew between the Q0–Q4, and Q/2 outputs. The QS5930T includes
an internal RC filter which provides excellent jitter characteristics and
eliminates the need for external components. Various combinations of
feedback and a divide-by-2 in the VCO path allow applications to be
customized for linear VCO operation over a wide range of input SYNC
frequencies. The PLL can also be disabled by the PLL_EN signal to
allow low frequency or DC testing. The QS5930T is designed for use
in cost sensitive high-performance computing systems, workstations,
multi-board computers, networking hardware, and mainframe sys-
tems. Several can be used in parallel or scattered throughout a sys-
tem for guaranteed low skew, system-wide clock distribution networks.
In the QSOP package, the QS5930T clock driver represents the best
value in small form factor, high-performance clock management prod-
ucts.
For more information on PLL clock driver products, see Application
Note AN-227.
SYNC
O E /R S T
FEEDBACK
PH ASE
DETECTOR
LOOP
FILTER
VCO
PLL_EN
FREQ_SEL
0
1
1
/2
0
R
D
Q
R
D
Q
R
D
Q
R
D
Q
R
D
Q
R
D
Q
Q
Q /2
Q4
Q3
Q2
INDUSTRIAL TEMPERATURE RANGE
1
c 2000 Integrated Device Technology, Inc.
Q1
Q0
SEPTEMBER 2000
DSC-5849