LDS6005 Datasheet, PDF (1/2 Pages) Integrated Device Technology – PureTouch™ Capacitance Touch IC

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LDS6005
PureTouch™ Capacitance Touch IC
The LDS6005 PureTouch™ controller empowers system designers to create streamlined, attractive,
and reliable product designs, enabling the replacement of mechanical controls with capacitive touch
buttons, sliders, and scroll wheels.
LDS6005 Features
Versatile, accurate capacitance-
to-digital converter (CDC)
• 500 kHz sigma-delta CDC
• 10 capacitance sensor input channels
• 2 ms update rate per active sensor
Integrated, automatic
calibration algorithms
• Environmental compensation
• On-chip RAM to store calibration data
Integrated touch preference modes
• Strongest single touch
• Strongest two touches
• Unrestricted (all) touches
Ultra-low touch sensor
power consumption*
• Operating mode (typical):
<150 uW (VDD1=1.8V)
• Shutdown mode (typical):
<1 uW (VDD1=1.8V)
Flexible interface options
• SPI-compatible serial I/F
• I²C-compatible serial I/F
• Separate V_DDIO level for serial interface
• GPIO and Interrupt Output
Description
The LDS6005 is a programmable capacitance-to-digital converter (CDC) designed for use with capacitive
sensor arrays implementing touch-based input controls including sliders, scroll wheels, and buttons.
Featuring 10 sensor inputs, the LDS6005 provides the flexibility to implement multiple touch inputs using
a single controller.
The capacitive sensor inputs are directed through an integrated switch matrix to a 500 kHz sigma-delta
CDC which senses changes in the external sensor array. When a sufficiently large change in capacitance
occurs, a sensor activation is registered and the host processor is notified.
On-chip calibration logic continuously monitors the environment and automatically adjusts on-and-off
threshold levels to prevent false sensor activation. The LDS6005 is offered with both SPI-compatible
and I²C-compatible interfaces (active interface selected by I/F select pin) and features a general-purpose
input/output (GPIO) and interrupt output for additional communication with the host processor.
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LDS6005
C0
C1
C2
Power-On
Calibration
Sigma-Delta
C3
Reset Logic
Engine
CDC
VDD1
VSS1
RESETB
TEST
C9
Calibration
RAM
Control and
Data Registers
* Excludes I/F and voltage dependent V_DDIO current
VDDIO
I/F SEL
Serial Interface and
Control Logic
SD0/ SDI/ SCLK/ CSB/
SDA A1 SCL A0
Interrupt and GPIO Logic
GPIO
INTB
Figure 1. LDS6005 block diagram
500 kHz
Excitation
Source
SHIELD
IDT^® LDS6005 PureTouch™ Capacitance Touch IC
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