IDTCV141 Datasheet, PDF (1/10 Pages) Integrated Device Technology – 1-TO-8 DIFFERENTIAL CLOCK BUFFER

IDTCV141
1-TO-8 DIFFERENTIAL CLOCK BUFFER
1-TO-8 DIFFERENTIAL
CLOCK BUFFER
COMMERCIAL TEMPERATURE RANGE
IDTCV141
FEATURES:
• Compliant with Intel DB800 spec
• Eight differential clock pairs at 0.7V
• 50ps skew
• 50ps cycle-to-cycle jitter
• Programmable Bandwidth
• PLL bypass configurable
• Divide by 2 programmable
• Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The CV141 differential buffer is compliant with Intel DB800 specifications. It
is intended to distribute the SRC (serial reference clock) as a companion chip
to the main clock of the CK409, CK410/CK410M, CK410B, etc. PLL is off in
bypass mode and has no clock detect.
OE_INV
(1)_OE[7:0]
(1)
SRC_STOP
(1)
PWRDWN
SCL
SDA
SRC_DIV2#
PLL/BYPASS#
SRC_IN
SRC_IN#
HIGH_BW#
Output
Control
SM Bus
Controller
DIV
PLL
Output
Buffer
DIF_0
DIF_0#
DIF_1
DIF_1#
DIF_2
DIF_2#
DIF_3
DIF_3#
DIF_4
DIF_4#
DIF_5
DIF_5#
DIF_6
DIF_6#
DIF_7
DIF_7#
NOTE:
1. See OE_INV table for active HIGH or active LOW.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
1
© 2005 Integrated Device Technology, Inc.
LOCK
OCTOBER 2005
DSC 6738/19