IDTCV115-2 Datasheet, PDF (1/19 Pages) Integrated Device Technology – PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR

IDTCV115-2
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
COMMERCIAL TEMPERATURE RANGE
PROGRAMMABLE FLEXPC™
CLOCK FOR P4 PROCESSOR
IDTCV115-2
FEATURES:
• One high precision N Programming PLL for CPU
• One high precision N Programming PLL for SRC/PCI
• One high precision PLL for SATA
• One high precision PLL for 96MHz/48MHz
• Band-gap circuit for differential outputs
• Support multiple spread spectrum modulation, down and
center
• Support SMBus block read/write, index read/write
• Selectable output strength for REF, PCI, and 48MHz
• Available in SSOP package
DESCRIPTION:
IDTCV115-2 is a 56 pin clock device, complying the latest Intel CK410
requirements, for Intel advance P4 processors. The CPU output buffer is
designed to support up to 400MHz processor. One dedicated PLL for Serial
ATA clock provides high accuracy frequency. This device also implements
Band-gap referenced IREF to reduce the impact of VDD variation on differential
outputs, which can provide more robust system performance.
Each CPU/SRC/PCI, SATA clock has its own Spread Spectrum selection,
which allows for isolated changes instead of affecting other clock groups.
KEY SPECIFICATION:
• CPU/SRC CLK cycle to cycle jitter < 85ps
• SATA CLK cycle to cycle jitter < 85ps
• Static PLL frequency divide error < 114 ppm
• Static PLL frequency divide error for 48MHz < 5 ppm
FUNCTIONAL BLOCK DIAGRAM
SATA PLL
SCC
14.318MHz
Osc
PCIEX PLL
SCC
N Programming
CPU PLL
SCC
N Programming
SATA/
PCI/
SRC4 - SATA
PCI[4:0], PCIF[2:0]
PCIE/
Host/
MUX
SRC[6:5] [3:1]
CPU_ITP/
SRC7
CPU[1:0]
48MHz/
USB48
Fixed PLL
No SCC
96MHz/
DOT96
OUTPUT TABLE
CPU
CPU_ITP/SRC
SRC
2
1
5
SATA PCI/PCIF REF/PCI REF
1
8
1
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
1
© 2004 Integrated Device Technology, Inc.
RESET
DOT96
1
24_48MHz
1
RESET
1
TURBO
2
APRIL 2004
DSC 6544/9