IDT82V2052E Datasheet, PDF (1/70 Pages) Integrated Device Technology – DUAL CHANNEL E1 SHORT HAUL LINE INTERFACE UNIT

DUAL CHANNEL E1
SHORT HAUL LINE INTERFACE UNIT
IDT82V2052E
FEATURES:
• Dual channel E1 short haul line interfaces
• Supports HPS (Hitless Protection Switching) for 1+1 protection
without external relays
• Single 3.3 V power supply with 5 V tolerance on digital interfaces
• Meets or exceeds specifications in
- ANSI T1.102
- ITU I.431, G.703, G.736, G.775 and G.823
- ETSI 300-166, 300-233 and TBR12/13
• Software programmable or hardware selectable on:
- Wave-shaping templates
- Line terminating impedance (E1: 75 Ω/120 Ω)
- Adjustment of arbitrary pulse shape
- JA (Jitter Attenuator) position (receive path or transmit path)
- Single rail/dual rail system interfaces
- HDB3/AMI line encoding/decoding
- Active edge of transmit clock (TCLK) and receive clock (RCLK)
- Active level of transmit data (TDATA) and receive data (RDATA)
- Receiver or transmitter power down
- High impedance setting for line drivers
- PRBS (Pseudo Random Bit Sequence) generation and detection
with 2¹⁵-1 PRBS polynomials
- 16-bit BPV (Bipolar Pulse Violation) / Excess Zero/ PRBS error
counter
- Analog loopback, Digital loopback, Remote loopback
• Adaptive receive sensitivity up to -20 dB (Host Mode only)
• Non-intrusive monitoring per ITU G.772 specification
• Short circuit protection and internal protection diode for line
drivers
• LOS (Loss Of Signal) detection with programmable LOS levels
(Host Mode only)
• AIS (Alarm Indication Signal) detection
• JTAG interface
• Supports serial control interface, Motorola and Intel Non-Multi-
plexed interfaces and hardware control mode
• Pin compatible to 82V2082 T1/E1/J1 Long Haul/Short Haul LIU
and 82V2042E T1/E1/J1 Short Haul LIU
• Available in 80-pin TQFP
Green package options available
DESCRIPTION:
The IDT82V2052E is a dual channel E1 Line Interface Unit. The
IDT82V2052E performs clock/data recovery, AMI/HDB3 line decoding and
detects and reports the LOS conditions. An integrated Adaptive Equalizer
is available to increase the receive sensitivity and enable programming of
LOS levels. In transmit path, there is an AMI/HDB3 encoder and Waveform
Shaper. There is one Jitter Attenuator, which can be placed in either the
receive path or the transmit path. The Jitter Attenuator can also be disabled.
The IDT82V2052E supports both Single Rail and Dual Rail system inter-
faces. To facilitate the network maintenance, a PRBS generation/detection
circuit is integrated in the chip, and different types of loopbacks can be set
according to the applications. Two different kinds of line terminating imped-
ance, 75 Ω and 120 Ω are selectable on a per channel basis. The chip also
provides driver short-circuit protection and internal protection diode and
supports JTAG boundary scanning. The chip can be controlled by either
software or hardware.
The IDT82V2052E can be used in LAN, WAN, Routers, Wireless Base
Stations, IADs, IMAs, IMAPs, Gateways, Frame Relay Access Devices,
CSU/DSU equipment, etc.
.IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
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 2005 Integrated Device Technology, Inc.
December 12, 2005
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