IDT7MP4060 Datasheet, PDF (1/8 Pages) Integrated Device Technology – 128K x 32 CMOS STATIC RAM MODULES

Integrated Device Technology, Inc.
128K x 32
CMOS STATIC RAM
MODULES
IDT7MP4060
IDT7MP4095
FEATURES:
• High density 4 megabit static RAM modules
• Low profile 64-pin ZIP (Zig-zag In-line vertical Package),
64-lead, 72-lead SIMMs (Single In-line Memory Modules)
• Fast access time: 15ns (max.)
• Surface mounted plastic components on an epoxy
laminate (FR-4) substrate
• Single 5V (±10%) power supply
• Multiple GND pins and decoupling capacitors for maxi-
mum noise immunity
• Inputs/outputs directly TTL compatible
• Gold plated fingers on the SIMM version
PIN CONFIGURATION – 7MP4095
PD0 2
I/O0 4
I/O1 6
I/O2 ⁸
I/O3 ¹⁰
VCC ¹²
A7 ¹⁴
A8 ¹⁶
A9 ¹⁸
I/O4 ²⁰
I/O5 ²²
I/O6 ²⁴
I/O7 ²⁶
28
WE
A14
30
32
CS1
CS3 ₃₄
A16 ₃₆
GND ₃₈
I/O16 ₄₀
I/O17 ₄₂
I/O18 ₄₄
I/O19 ₄₆
A10 ₄₈
A11 ₅₀
A12 ₅₂
A13 ₅₄
I/O20 ₅₆
I/O21 ₅₈
I/O22 60
I/O23 62
GND 64
1 GND
3 PD1
5 I/O8
7 I/O9
9 I/O10
11 I/O11
13 A0
15 A1
17 A2
19 I/O12
21 I/O13
23 I/O14
25 I/O15
27 GND
29 A15
31 CS2
33 CS4
35 NC
37 OE
39 I/O24
41 I/O25
43 I/O26
45 I/O27
47 A3
49 A4
51 A5
53 VCC
55 A6
57 I/O28
59 I/O29
61 I/O30
63 I/O31
PD0 - OPEN
PD1 - OPEN
ZIP, SIMM
TOP VIEW
DESCRIPTION:
The IDT7MP4095/7MP4060 are 128K x 32 static RAM
modules constructed on an epoxy laminate (FR-4) substrate
using four 128K x 8 static RAMs in plastic SOJ packages. The
IDT7MP4095/7MP4060 are available with access times as
fast as 15ns with minimal power consumption.
The IDT7MP4095 is packaged in a 64-pin FR-4 ZIP (Zig-
zag In-line vertical Package) or a 64-lead SIMM (Single In-line
Memory Module). The IDT7MP4060 is packaged in a 72-lead
SIMM. The ZIP configuration allows 64 pins to be placed on
a package 3.65 inches long and 0.21 inches thick. At only 0.60
inches high, this low-profile package is ideal for systems with
minimum board spacing, while the SIMM configuration allows
use of edge mounted sockets to secure the module.
All inputs and outputs of the IDT7MP4095/7MP4060 are
TTL compatible and operate from a single 5V supply. Full
asynchronous circuitry requires no clocks or refresh for opera-
tion and provides equal access and cycle times for ease of
use.
FUNCTIONAL BLOCK DIAGRAM
CS1 CS2 CS3 CS4
17
ADDRESS
WE
OE
128K x 32
RAM
PIN NAMES
I/O0–31
A0–16
CS1–4
WE
OE
VCC
GND
NC
8
8
8
8
I/O 0-31
3147 drw 01
Data Inputs/Outputs
Addresses
Chip Selects
Write Enable
Output Enable
Power
Ground
No Connect
3147 tbl 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391. _7.09
SEPTEMBER 1996
DSC-3147/7
1