IDT7M1002 Datasheet, PDF (1/12 Pages) Integrated Device Technology – 16K x 32 CMOS DUAL-PORT STATIC RAM MODULE

Integrated Device Technology, Inc.
16K x 32 CMOS
DUAL-PORT STATIC RAM
MODULE
IDT7M1002
FEATURES
• High-density 512K CMOS Dual-Port RAM module
• Fast access times
—Commercial: 30, 35ns
—Military: 40, 45ns
• Fully asynchronous read/write operation from either port
• Easy to expand data bus width to 64 bits or more using
the Master/Slave function
• Separate byte read/write signals for byte control
• On-chip port arbitration logic
• INT flag for port-to-port communication
• Full on-chip hardware support of semaphore signaling
between ports
• Surface mounted fine pitch (25 mil) LCC packages allow
through-hole module to fit into 121 pin PGA footprint
• Single 5V (±10%) power supply
• Inputs/outputs directly TTL-compatible
DESCRIPTION
The IDT7M1002 is a 16K x 32 high-speed CMOS Dual-Port
Static RAM Module constructed on a co-fired ceramic sub-
strate using four 16K x 8 (IDT7006) Dual-Port Static RAMs in
surface-mounted LCC packages. The IDT7M1002 module is
designed to be used as stand-alone 512K Dual-Port RAM or
as a combination Master/Slave Dual-Port RAM for 64-bit or
more word width systems. Using the IDT Master/Slave ap-
proach in such system applications results in full-speed, error-
free operation without the need for additional discrete logic.
The module provides two independent ports with separate
control, address, and I/O pins that permit independent and
asynchronous access for reads or writes to any location in
memory. System performance is enhanced by facilitating
port-to-port communication via additional control signals SEM
and INT.
The IDT7M1002 module is packaged in a ceramic 121 pin
PGA (Pin Grid Array)1.35 inches on a side. Maximum access
times as fast as 30ns are available over the commercial
temperature range and 40ns over the military temperature
range.
All IDT military modules are constructed with semiconduc-
tor components manufactured in compliance with the latest
revision of MIL-STD-883, Class B making them ideally suited
to applications demanding the highest level of performance
and reliability.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
A L_I/O(24) L_I/O(26) L_I/O(28) L_I/O(30) L_CS
B L_I/O(23) L_I/O(25) L_I/O(27) L_I/O(29) L_I/O(31)
C L_I/O(21) L_I/O(22) VCC
L_A(3) L_A(2)
D L_I/O(19) L_I/O(20)
E L_I/O(17) L_I/O(18)
F L_SEM L_I/O(16)
G L_BUSY L_INT
H _{L_R/W(1)} L_R/W(2)
I L_I/O(15) L_I/O(14)
J L_I/O(13) L_I/O(12)
K L_I/O(11)
M/S
L_A(4)
L_A(5)
L_A(6)
GND
L_A(7)
L_A(8)
L_A(9)
GND
GND
L_A(10) L_A(11)
L L_I/O(10) L_I/O(8) L_I/O(6) L_I/O(4) L_I/O(2)
L_OE
L_A(0)
L_A(1)
L_A(12)
L_A(13)
L_R/W(3)
L_R/W(4)
GND
R_OE
R_A(0)
R_A(1)
R_CS R_I/O(30) R_I/O(28) R_I/O(26) R_I/O(24)
R_I/O(31) R_I/O(29) R_I/O(27) R_I/O(25) R_I/O(23)
R_A(2) R_A(3)
GND R_I/O(22) R_I/O(21)
R_A(4) R_I/O(20) R_I/O(19)
PGA
TOP VIEW
GND R_A(12) R_A(11)
R_A(10)
R_A(5)
R_A(6)
GND
R_A(7)
R_A(8)
R_A(9)
VCC
R_I/O(18) R_I/O(17)
R_I/O(16) R_SEM
R_INT R_BUSY
R_R/W (2) R_R/W (1)
R_I/O(14) R_I/O(15)
R_I/O(12) R_I/O(13)
GND R_I/O(11)
R_R/W (4) ^{R_A(13) R_I/O(2) R_I/O(4) R_I/O(6) R_I/O(8) R_I/O(10)}
M L_I/O(9) L_I/O(7) L_I/O(5) L_I/O(3) L_I/O(1) L_I/O(0) R_R/W (3) R_I/O(0) R_I/O(1) R_I/O(3) R_I/O(5) R_I/O(7) R_I/O(9)
2795 drw 01
The IDT logo is a registered trademark of Integrated Device Technology Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
7.02
DECEMBER 1995
DSC-2795/5
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