IDT77V1254L25 Datasheet, PDF (1/47 Pages) Integrated Device Technology – Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks

Quad Port PHY (Physical Layer)
for 25.6 and 51.2
ATM Networks
IDT77V1254L25
Features List
‹ _{Performs the PHY-Transmission Convergence (TC) and}
Physical Media Dependent (PMD) Sublayer functions for
four 25.6 Mbps ATM channels
‹ _{Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5}
specifications for 25.6 Mbps physical interface
‹ _{Also operates at 51.2 Mbps data rate}
‹ _{UTOPIA Level 1, UTOPIA Level 2, or DPI-4 Interface}
‹ _{3-Cell Transmit & Receive FIFOs}
‹ _{LED Interface for status signalling}
‹ _{Supports UTP Category 3 and 5 physical media}
‹ _{Interfaces to standard magnetics}
‹ _{Low-Power CMOS}
‹ _{3.3V supply with 5V tolerant inputs}
‹ _{144-pin PQFP Package (28 x 28 mm)}
‹ _{Commercial and Industrial Temperature Ranges}
Description
The IDT77V1254L25 is a member of IDT's family of products
supporting Asynchronous Transfer Mode (ATM) data communications
and networking. The IDT77V1254L25 implements the physical layer for
25.6 Mbps ATM, connecting four serial copper links (UTP Category 3
and 5) to one ATM layer device such as a SAR or a switch ASIC. The
IDT77V1254L25 also operates at 51.2 Mbps, and is well suited to back-
plane driving applications.
The 77V1254L25-to-ATM layer interface is selectable as one of three
options: 16-bit UTOPIA Level 2, 8-bit UTOPIA Level 1 Multi-PHY, or
quadruple 4-bit DPI (Data Path Interface).
The IDT77V1254L25 is fabricated using IDT's state-of-the-art CMOS
technology, providing the highest levels of integration, performance and
reliability, with the low-power consumption characteristics of CMOS.
Block Diagram
TX C LK
T X D A T A [15:0]
T X P A R IT Y
TXSO C
TXEN
TX C LA V
T X A D D R [4:0]
M O D E [1:0]
R X A D D R [4:0]
R X C LK
R X D A T A [15:0]
R X P A R IT Y
RXSO C
RXEN
R X C LAV
P H Y -A T M
In te rfa ce
(U T O P IA or D P I)
TXREF
T X /R X A T M
C ellF IF O
S cram bler/
D escram bler
5B /4B
E ncoding/
D ecoding
P /S and S /P
N R ZI
D river
C lock R ecovery
T X /R X A T M
C ellF IF O
S cram bler/
D escram bler
5B /4B
E ncoding/
D ecoding
P /S and S /P
N R ZI
D river
C lock R ecovery
+
-TX ⁰
+
-RX ⁰
+
-Tx ¹
+
-
R
x
1
INT
RST
RD
WR
CS
A D [7:0]
A LE
O SC
M icroprocessor
In te rfa ce
T X /R X A T M
C ellF IF O
S cram bler/
D escram bler
5B /4B
E ncoding/
D ecoding
P /S and S /P
N R ZI
D river
C lock R ecovery
T X /R X A T M
C ellF IF O
S cram bler/
D escram bler
4
4
5B /4B
E ncoding/
D ecoding
P /S and S /P
N R ZI
D river
C lock R ecovery
RXREF
R X LE D [3:0] T X LE D [3:0]
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
 2001 Integrated Device Technology, Inc.
1 of 47
+
-TX ²
+
-RX ²
+
-TX ³
+
-RX ³
35 0 5 drw 0 1
.
September 21, 2001
DSC 6003