IDT75K72100 Datasheet, PDF (1/3 Pages) Integrated Device Technology – Network Search Engine 256K x 72 Entries

Network Search Engine
256K x 72 Entries
Datasheet
Brief
75K72100
To request the full IDT75K72100 datasheet, please contact your local
IDT Sales Representative or call 1-831-754-4555
Device Description
IDT provides proven, industry-leading network search engines
(NSEs) and a comprehensive suite of software that enable and accelerate
the intelligent processing of network services in communications equip-
ment. As a part of the complete IDT classification subsystem that includes
content inspection engines, the IDT family of NSEs delivers high-
performance, feature-rich, easy-to-use, integrated search accelerators.
Operating at up to 250 million searches per second, the IDT
75K72100 NSE offers designers the ability to simultaneously search in
separate, mutually exclusive databases, increasing the search rate to
support multiple full-speed OC-192 packet searches per instruction with
a single device. Targeting core, metro and edge routers, this device
enables higher-performance systems to achieve increased packet pro-
cessing rates and facilitates additional services, through simultaneous
database lookup (SMDL) and sophisticated next free address (NFA)
capabilities.
The IDT 75K72100 NSE is a high performance pipelined low-power,
synchronous full-ternary 256K x 72 entry device and provides array
segments which can be configured to enable multiple width lookups from
36 to 576 bits wide. This NSE device provides the user with flexibility and
control in determining the device power. Only the array segments that
will be used for a specific NSE operation are powered up while the unused
segments are not. The IDT 75K72100 NSE requires a 1.2-volt VDD
supply and a 2.5V VDDQ supply.
The IDT 75K72100 NSE utilizes the latest high-performance 1.2V
CMOS processing technology and is packaged in a JEDEC Standard,
thermally enhanced, low profile Ball Grid Array. IDT's 472 BGA package
provides increased heat transfer for thermally challenged systems. The
472 BGA footprint is backwards compatible with the IDT 128K x 72 Entry
(75K62100), 64K x 72 Entry (75P52100) and 32K x 72 Entry (75P42100)
devices.
Block Diagram
LAST NSE
LAST SRAM
Configuration Registers
and
Ram Control Circuits
RESET
REQSTB
Command
Bus
NSE
REQUEST
BUS
Request
Data
Bus
R/W
Instruction
D
E
C
Address
O
D
E
P
R
S
I
I
O
Z
R
E
I
ARRAY
T
L
Y
O
G
E
I
N
C
C
O
D
E
R
Bypass
DATA
Comparand Registers
Global Mask Registers
Result Register
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SRAM CONTROL
ASIC FEEDBACK
Index
Bus
NSE
RESPONSE
BUS
MMOUT
MATCHOUT
System Configurations
The IDT NSEs are designed to fulfill the needs of various types of ^{Figure 1.0 ASIC / Compatible NSE/ SRAM configuration}
networking systems. In solutions requiring data searching such as
routers, a system configuration as shown in Figure 1.0 may be realized.
Maximum flexibility is provided by allowing one board design to be
populated today using either the IDT 75P42100, 75P52100 or 75K62100
NSEs and later upgraded to use IDT’s 75K72100 NSE.
ASIC
or
FPGA
IDT
75P42100 or
75P52100 or
75K62100 or
75K72100
Optional
ZBT
or
Sync SRAM
In this compatible configuration, the NSE interfaces directly to an
ASIC/ FPGA for lookups and routes an Index to an associated SRAM
Network Search Engine
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device, which supplies the next hop address via an SRAM Data Bus to
the ASIC. The NSE provides the required control signals to directly
hookup to ZBT™ or Synchronous Pipeline Burst SRAM. Lookup results
can also be fed directly back to the ASIC/ FPGA without the use of external
SRAM. Control of the associated handshake signals is provided by all
NSEs to adapt to either configuration.
JUNE 2003
1
© 2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
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