IDT75K52413 Datasheet, PDF (1/1 Pages) Integrated Device Technology – 4.5M Network Search Engine (NSE) with Quad AMCC XSC Interface

4.5M Network Search
Engine (NSE) with Quad
AMCC XSC Interface
Advanced
Information
IDT75K52413
To request the full datasheet, please contact your local
IDT Sales Representative or call 1-831-754-4555
Introduction
Device Description
As part of the IDT IP Co-Processor product family, IDT delivers high
performance, feature-rich, easy-to-use, Network Search Engine (NSE)
products. Using CAM (Content Addressable Memory) technology, IDT
NSE products accelerate search functions for Access Control Lists (ACL),
Flow Caching, and forwarding to improve performance in next generation
networking equipment.
The NSE Quad XSC interface is intended to work with any AMCC NPU
with an external search co-processor interface (XSC). It will operate with
multiple NPUs such as the nP3400 and nP7250, or can be used to satisfy
the four XSC requirements of the nP7510. The 75K52413 is compliant with
the XSC specification and the device may be optionally expanded up to
eight devices deep providing 1 million entries of 32-bit width.
Features
x _{64K x 72 (4.5M) Data and Mask cells}
x _{Full Ternary Content Addressable Memory}
x _{Advanced Database Management}
- SelectableDatabases
- ProgrammableWidthperDatabase
- Lookup widths from 32 to 512 bits
- Only the selected Database is powered
x _{Maintenance Instructions}
- Aging
- MultiHitInvalidate
- Learn per Database
x _{Support for Multiple Contexts}
x _{Pool of Global Mask Registers}
x _{Control and Management}
- 32-bit Host control port featuring glueless PPC interface
- Capable of In-Band Control and Management
x _{Associated Data SRAM is supported through a glueless ZBT®}
interface
x _{Lowest Power per Application}
x _{Synchronous Pipeline Operation}
x _{Boundary Scan JTAG Interface}
x _{1.2V Core Supply}
x _{3.3V I/O Supply for XSC I/O and ZBT® SRAM}
Figure 1.0 AMCC NPU Interface
CPU
NPU#0
NPU#1
NPU#2
CPU Port
May be expanded up to 8 NSE devices
NSE
#0
CPU
Request
NSE
#1
CPU
Request
NSE
#2
NPU#3
4 NPU
Request
Ports
Result Interface
One, two or four XSC interfaces can be enabled
Optional
ASSOCIATED
ZBT SRAM
4 NPU
Response
Ports
6106 dw00
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© 2002 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
APRIL 2003
DSC-6106/00