IDT75K52134 Datasheet, PDF (1/1 Pages) Integrated Device Technology – 4.5M and 9M Network Search Engine (NSE) with QDR™ Interface

4.5M and 9M Network
Search Engine (NSE)
with QDR^™ Interface
Product
Brief
IDT75K52134
IDT75K62134
To request the full datasheet, please contact your local
IDT Sales Representative or call 1-831-754-4555
Introduction
Evolving network speeds require critical functions such as forwarding
and classification to migrate towards dedicated hardware devices. The
Network Search Engine (NSE) based on IDT's CAM (Content Addres-
sable Memory) technology accelerates search functions required for
applications such as Access Control Lists (ACL), Flow Caching and
Forwarding.
Device Description
The NSE with a single QDR™ (Quad Data Rate) interface is intended
to work with any NPU having a QDR™ look aside interface. Multiple
devices including the QDR™ NSE can be connected to the same QDR™
interface. Each QDR™ NSE device may be point-to-point expanded up
to eight NSE devices.
NSE Features
x _{128K x 72 (9M) or 64K x 72 (4.5M) Data and Mask cells}
x _{Full Ternary Content Addressable Memory}
x _{Advanced Database Management}
- SelectableDatabases
- ProgrammableWidthperDatabase
- Lookup widths from 32 to 576 bits
- Only the selected Database is powered
x _{LookupInstructions}
- Standard Lookup
- Multi-HitLookup
- Multi-DatabaseLookup
- Re-Issue Multi-Database Lookup
x _{Maintenance Features}
- Aging
- MultiHitInvalidate
- Learn per Database
x _{Multi-Context support}
x _{Pool of (72-bit) Global Mask Registers (shared across contexts)}
x _{In-Band Control and Management}
x _{Assoicated Data SRAM is supported through a glue-less ZBT®}
interface
x _{Lowest Power per Application}
x _{Synchronous Pipeline Operation}
x _{Boundary Scan JTAG Interface}
x _{1.2V Core Supply}
x _{1.5V HSTL I/O Supply}
x _{2.5V I/O Supply for ZBT® Associated Data SRAM}
x _{35mm x 35mm BGA Package}
External Interfaces
The following external interfaces are supported by the QDR™ NSE device
x _{Single QDR™ NPU interface}
- QDR™ Clock Frequency up to 250 MHz
- Supports QDR™ burst of 2
- Echo clocks supported (CQ, CQ)
x _{Point-to-PointCascadingInterface}
- Up to eight NSEs can be cascaded using this scheme
x _{Associated Data SRAM with standard ZBT® Interface}
x _{Boundary Scan JTAG Interface (IEEE 1149.1)}
Figure 1.0 QDR™ NSE External Interfaces
QDR
Read
Control
Logic
256K x 36 Full
Ternary Content
Addressable Memory
Cascade
Interface
QDR
W rite
Control
Logic
ZBT
Interface
JTAG Interface
6070 drw04aa
JANUARY 2003
1
© 2002 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
DSC-6070/00
ZBT and ZeroBus Turnaround are trademarks of Integrated Device Technology, Inc. and the architecture is supported by Micron Technology and Motorola Inc.
QDR™ - Quad Data Rate (Trademark of Cypress, IDT, Micron, NEC and Samsung.) All brands or products are the trademarks or registered trademarks of their
respective owners.