IDT74LVCH32245A Datasheet, PDF (1/7 Pages) Integrated Device Technology – 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD

IDT74LVCH32245A
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 32-BIT
IDT74LVCH32245A
BUS TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
FEATURES:
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in 96-ball LFBGA package
DRIVE FEATURES:
• Balanced Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
DESCRIPTION:
This 32-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power transceiver is ideal for asynchro-
nous communication between two busses (A and B). The Direction and
Output Enable controls are designed to operate the device as either four
independent 8-bit transceivers or one 32-bit transceiver. The direction
control pins (DIR) control the direction of data flow. The output enable pins
(OE) override the direction control and disable both ports. All inputs are
designed with hysteresis for improved noise margin.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCH32245A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance
The LVCH32245A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1DIR ^A3
1A1 ^A5
A4
1OE
A2
1B1
3DIR ^J3
3A1 ^J5
J4
3OE
J2 _3B1
TO SEVEN OTHER CHANNNELS
H3
2DIR
E5
2A1
TO SEVEN OTHER CHANNNELS
H4
2OE
E2 _2B1
4DIR ^T3
4A1 ^N5
T4
4OE
N2
4B1
TO SEVEN OTHER CHANNNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
©2000 Integrated Device Technology, Inc.
TO SEVEN OTHER CHANNNELS
FEBRUARY 2000
DSC-4767/1