IDT74LVCH245A Datasheet, PDF (1/6 Pages) Integrated Device Technology – 3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD

IDT74LVCH245A
3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS OCTAL BUS
TRANSCEIVER WITH 3-STATE
OUTPUTS, 5 VOLT TOLERANT I/O
AND BUS-HOLD
IDT74LVCH245A
FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SOIC, SSOP, QSOP, and TSSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
DESCRIPTION:
The LVCH245A octal bus transceiver is built using advanced dual metal
CMOS technology. The device is designed for asynchronous communi-
cation between data buses. Data is transmitted from the A bus to the B bus
or from the B bus to the A bus, depending upon the logic level at the direction-
control (DIR) input. The output-enable (OE) input can be used to disable
the device so the buses are effectively isolated.
The LVCH245A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH245A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high-impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
FUNCTIONAL BLOCK DIAGRAM
DIR ¹
A1 ²
19 _OE
18
B1
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 1999 Integrated Device Technology, Inc.
OCTOBER 1999
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