IDT74FCT841AT Datasheet, PDF (1/7 Pages) Integrated Device Technology – FAST CMOS BUS INTERFACE LATCHES

Integrated Device Technology, Inc.
FAST CMOS
BUS INTERFACE
LATCHES
IDT54/74FCT841AT/BT/CT/DT
FEATURES:
• Common features:
– Low input and output leakage ≤1µA (max.)
– CMOS power levels
– True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
– Meets or exceeds JEDEC standard 18 specifications
– Product available in Radiation Tolerant and Radiation
Enhanced versions
– Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
– Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
• Features for FCT841T:
– A, B, C and D speed grades
– High drive outputs (-15mA IOH, 48mA IOL)
– Power off disable outputs permit “live insertion”
DESCRIPTION:
The FCT8xxT series is built using an advanced dual metal
CMOS technology.
The FCT8xxT bus interface latches are designed to elimi-
nate the extra packages required to buffer existing latches
and provide extra data width for wider address/data paths or
buses carrying parity. The FCT841T are buffered, 10-bit wide
versions of the popular FCT373T function. They are ideal for
use as an output port requiring high IOL/IOH.
All of the FCT8xxT high-performance interface family can
drive large capacitive loads, while providing low-capacitance
bus loading at both inputs and outputs. All inputs have clamp
diodes to ground and all outputs are designed for low-capaci-
tance bus loading in high-impedance state.
FUNCTIONAL BLOCK DIAGRAM
D0
D1
D2
D3
D4
D5
D8
D9
D
LE ^Q
D
LE ^Q
D
LE ^Q
D
LE ^Q
D
LE ^Q
D
LE ^Q
D
LE ^Q
D
LE ^Q
LE
OE
Y0
Y1
Y2
Y3
Y4
Y5
Y8
Y9
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The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
6.22
JUNE 1996
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