IDT74FCT823AT_06 Datasheet, PDF (1/7 Pages) Integrated Device Technology – HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER

IDT74FCT823AT/CT
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER
HIGH-PERFORMANCE
CMOS BUS
INTERFACE REGISTER
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT823AT/CT
FEATURES:
• A and C grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Power off disable outputs permit "live insertion"
• Available in the SOIC and QSOP packages
DESCRIPTION:
The FCT823T series is built using an advanced dual metal CMOS
technology. The FCT823T series bus interface registers are designed to
eliminate the extra packages required to buffer existing registers and
provide extra data width for wider address/data paths or buses carrying
parity. The FCT823T is a 9-bit wide buffered register with Clock Enable
(EN) and Clear (CLR) – ideal for parity bus interfacing in high-performance
microprogrammed systems.
The FCT823T high-performance interface family can drive large capacitive
loads, while providing low-capacitance bus loading at both inputs and
outputs. All inputs have clamp diodes and all outputs are designed for low-
capacitance bus loading in high-impedance state.
FUNCTIONAL BLOCK DIAGRAM
D0
DN
EN
CLR
CP
D ^CL Q
CP _Q
OE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2006 Integrated Device Technology, Inc.
Y0
1
D ^CL Q
CP _Q
YN
JUNE 2006
DSC-5487/4