IDT74FCT646T_02 Datasheet, PDF (1/8 Pages) Integrated Device Technology – FAST CMOS OCTAL TRANSCEIVER/ REGISTER (3-STATE)

IDT54/74FCT646T/AT/CT
FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS OCTAL
TRANSCEIVER/
REGISTER (3-STATE)
IDT54/74FCT646T/AT/CT
FEATURES:
• Std., A, and C grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 64mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
• Power off disable outputs permit "live insertion"
• Available in the following packages:
– Industrial: SOIC, SSOP, QSOP, TSSOP
– Military: CERDIP, LCC
DESCRIPTION:
The FCT646T consists of a bus transceiver with 3-state D-type flip-flops
and control circuitry arranged for multiplexed transmission of data directly
from the data bus or from the internal storage registers. The FCT646T
utilizes the enable control (G) and direction (DIR) pins to control the
transceiver functions.
SAB and SBA control pins are provided to select either real- time or stored
data transfer. The circuitry used for select control will eliminate the typical
decoding glitch that occurs in a multiplexer during the transition between
stored and real-time data. A low input level selects real-time data and a high
selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D flip-
flops by low-to-high transitions at the appropriate clock pins (CPAB or
CPBA), regardless of the select or enable control pins.
FUNCTIONAL BLOCK DIAGRAM
G
DIR
CPBA
SBA
CPAB
SAB
ONE OF EIGHT CHANNELS
A1
A REG
1D
C1
B REG
1D
C1
B1
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
© 2002 Integrated Device Technology, Inc.
JUNE 2002
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