English
Language : 

IDT74FCT373T Datasheet, PDF (1/8 Pages) Integrated Device Technology – FAST CMOS OCTAL TRANSPARENT LATCHES
Integrated Device Technology, Inc.
FAST CMOS OCTAL
TRANSPARENT
LATCHES
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT
IDT54/74FCT533T/AT/CT
IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FEATURES:
– Reduced system switching noise
• Common features:
– Low input and output leakage ≤1µA (max.)
– CMOS power levels
– True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
– Meets or exceeds JEDEC standard 18 specifications
– Product available in Radiation Tolerant and Radiation
Enhanced versions
– Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
– Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
• Features for FCT373T/FCT533T/FCT573T:
– Std., A, C and D speed grades
– High drive outputs (-15mA IOH, 48mA IOL)
– Power off disable outputs permit “live insertion”
• Features for FCT2373T/FCT2573T:
– Std., A and C speed grades
– Resistor output (-15mA IOH, 12mA IOL Com.)
(-12mA IOH, 12mA IOL Mil.)
DESCRIPTION:
The FCT373T/FCT2373T, FCT533T and FCT573T/
FCT2573T are octal transparent latches built using an ad-
vanced dual metal CMOS technology. These octal latches
have 3-state outputs and are intended for bus oriented appli-
cations. The flip-flops appear transparent to the data when
Latch Enable (LE) is HIGH. When LE is LOW, the data that
meets the set-up time is latched. Data appears on the bus
when the Output Enable (OE) is LOW. When OE is HIGH, the
bus output is in the high- impedance state.
The FCT2373T and FCT2573T have balanced drive out-
puts with current limiting resistors. This offers low ground
bounce, minimal undershoot and controlled output fall times-
reducing the need for external series terminating resistors.
The FCT2xxxT parts are plug-in replacements for FCTxxxT
parts.
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT373T/2373T AND IDT54/74FCT573T/2573T
D0
D1
D2
D3
D4
D5
D6
D7
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
LE
OE
O0
O1
O2
O3
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT533T
D0
D1
D2
D3
D4
O4
D5
O5
D6
O6
D7
O7
2564 cnv* 01
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
LE
OE
O0
O1
O2
O3
O4
O5
O6
O7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2564 cnv* 02
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1995
©1995 Integrated Device Technology, Inc.
6.12
DSC-4216/6
1