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IDT74FCT16601AT Datasheet, PDF (1/7 Pages) Integrated Device Technology – FAST CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS | |||
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Integrated Device Technology, Inc.
FAST CMOS
18-BIT UNIVERSAL BUS
TRANSCEIVER
WITH 3-STATE OUTPUTS
IDT74FCT16601AT/CT/ET
IDT74FCT162601AT/CT/ET
PRODUCT PREVIEW
FEATURES:
bit registered transceivers are built using advanced dual metal
⢠Common features:
CMOS technology. These high-speed, low-power 18-bit reg-
â 0.5 MICRON CMOS Technology
istered bus transceivers combine D-type latches and D-type
â High-speed, low-power CMOS replacement for
flip-flops to allow data flow in either direction in a transparent,
ABT functions
latched or clocked mode. Each direction has an independent
â Typical tSK(o) (Output Skew) < 250ps
latch enable, an independent clock with a clock enable, and an
â Low input and output leakage â¤1µA (max.)
independent output enable. The package is organized with a
â ESD > 2000V per MIL-STD-883, Method 3015;
flow-through signal pin organization to ease board layout. All
> 200V using machine model (C = 200pF, R = 0)
inputs are designed with hysteresis for improved noise mar-
â Packages include 25 mil pitch SSOP, 19.6 mil pitch
gin.
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack This transceiver is ideally suited for high speed memory
â Extended commercial range of -40°C to +85°C
interfaces which utilize high speed synchronous writes, by
â VCC = 5V ±10%
clocking the data into a high speed register. Reads can then
⢠Features for FCT16601AT/CT/ET:
be performed in a transparent or latched mode utilizing the
â High drive outputs (-32mA IOH, 64mA IOL)
same transceiver.
â Power off disable outputs permit âlive insertionâ
The FCT16601AT/CT/ET are ideally suited for driving
â Typical VOLP (Output Ground Bounce) < 1.0V at
high-capacitance loads and low-impedance backplanes. The
VCC = 5V, TA = 25°C
output buffers are designed with power off disable capability
⢠Features for FCT162601AT/CT/ET:
to allow "live insertion" of boards when used as backplane
â Balanced Output Drivers: ±24mA
drivers.
â Reduced system switching noise
The FCT162601AT/CT/ET have balanced output drive
â Typical VOLP (Output Ground Bounce) < 0.6V at
with current limiting resistors. This offers low ground bounce,
VCC = 5V,TA = 25°C
minimal undershoot, and controlled output fall timesâreducing
the need for external series terminating resistors. The
DESCRIPTION:
FCT162601AT/CT/ET are plug-in replacements for the
FCT16601AT/CT/ET and ABT16601 for on-board bus inter-
The FCT16601AT/CT/ET and FCT162601AT/CT/ET 18- face applications.
FUNCTIONAL BLOCK DIAGRAM
OEAB 1
CLKENAB 56
CLKAB 55
2
LEAB
28
LEBA
30
CLKBA
CLKENBA 29
27
OEBA
3
A1
CE
1D
C1
CLK
CE
1D
C1
CLK
54 B1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
TO 17 OTHER CHANNELS
5.9
3247 drw 01
AUGUST 1996
DSC-3247/-
1
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