IDT74FCT162H272AT Datasheet, PDF (1/8 Pages) Integrated Device Technology – FAST CMOS 12-BIT SYNCHRONOUS BUS EXCHANGER

Integrated Device Technology, Inc.
FAST CMOS
12-BIT SYNCHRONOUS
BUS EXCHANGER
IDT54/74FCT162H272AT/CT/ET
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage ≤ 1µA (max.)
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP,
15.7 mil pitch TVSOP and 25 mil pitch Cerpack
• Extended commercial range of -40°C to +85°C
• Balanced Output Drivers: ±24mA (commercial)
±16mA (military)
• Reduced system switching noise
• Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V, TA = 25°C
• Bus Hold retains last active bus state during 3-state
• Eliminates the need for external pull up resistors
DESCRIPTION:
The FCT162H272AT/CT/ET synchronous tri-port bus ex-
changers are high-speed, bidirectional,12-bit, registered, bus
multiplexers for use in synchronous memory interleaving
applications. All registers have a common clock and use a
clock enable (CExxx) on each data register to control data
sequencing. The output enables and mux select (OEA, OEB
and SEL) are also under synchronous control allowing direc-
tion changes to be edge triggered events.
The tri-port bus exchanger has three 12-bit ports. Data may
be transferred between the A port and either/both of the B
ports. The clock enable (CE1B, CE2B, CEA1B and CEA2B)
inputs control the data storage. Both B ports have a common
output enable (OEB) to aid in synchronously loading the B
registers from the B port.
The FCT162H272AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times-reducing
the need for external series terminating resistors.
The FCT162H272AT/CT/ET have "Bus Hold" which re-
tains the input's last state whenever the input goes to high
impedance. This prevents "floating" inputs and eliminates the
need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
CEA1B
CLK
CE1B
SEL
OEB
12
CONTROL
REGISTER
OEA
A1:12
M1
U
12
X0
CE2B
12
CEA2B
CE _A-1B
REGISTER
D
Q
12
CE _1B-A
REGISTER
D
Q
12
12
CE _2B-A
REGISTER
Q
12
D
12
CE _A-2B
REGISTER
D
Q ₁₂
1B1:12
2B1:12
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
5.5
3071 drw 01
AUGUST 1996
DSC-3071/3
1