IDT74FCT138T Datasheet, PDF (1/6 Pages) Integrated Device Technology – FAST CMOS 1-OF-8 DECODER WITH ENABLE

Integrated Device Technology, Inc.
FAST CMOS
1-OF-8 DECODER
WITH ENABLE
IDT54/74FCT138T/AT/CT
FEATURES:
• Std., A and C speed grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
• Available in DIP, SOIC, QSOP, CERPACK and
LCC packages
DESCRIPTION:
The IDT54/74FCT138T/AT/CT are 1-of-8 decoders built
using an advanced dual metal CMOS technology. The IDT54/
74FCT138T/AT/CT accepts three binary weighted inputs (A0,
A1, A2) and, when enabled, provides eight mutually exclusive
active LOW outputs (O0-O7). The IDT54/74FCT138T/AT/CT
features three enable inputs, two active LOW (E1, E2) and one
active HIGH (E3). All outputs will be HIGH unless E1 and E2 are
LOW and E3 is HIGH. This multiple enable function allows
easy parallel expansion of the device to a 1-of-32 (5 lines to
32 lines) decoder with just four IDT54/74FCT138T/AT/CT
devices and one inverter.
FUNCTIONAL BLOCK DIAGRAM
A2 A1
A0
E1 E2 E3
PIN CONFIGURATIONS
A0 1
16
VCC
A1
2
15
P16-1
O0
A2
3 _D16-1 14
O1
E1 4 SO16-1 13
O2
E2 5 ^SO16-7 12
O3
E3
&
6 _E16-1 11
O4
O7 7
10
O5
GND 8
9
O6
DIP/SOIC/QSOP/CERPACK
TOP VIEW
INDEX
2570 drw 02
O7
O6
O5
O4
O3
O2
O1
O0
2570 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1995 Integrated Device Technology, Inc.
6.3
3 2 20 19
A2 4
1
18 O1
E1 ₅
17 O2
NC ₆
L20-2
16 ^NC
E2 7
15 O3
E3 8
14 O4
9 10 11 12 13
2570 drw 03
LCC
TOP VIEW
APRIL 1995
DSC-4213/5
1