IDT74ALVCHR16501 Datasheet, PDF (1/7 Pages) Integrated Device Technology – 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD

IDT74ALVCHR16501
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 18-BIT UNIVERSAL IDT74ALVCHR16501
BUS TRANSCEIVER WITH
3-STATE OUTPUTS
AND BUS-HOLD
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in TSSOP package
DRIVE FEATURES:
• Balanced Output Drivers: ±12mA
• Low Switching Noise
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
DESCRIPTION:
This 18-bit universal bus transceiver is built using advanced dual metal
CMOS technology. Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch enable (LEAB and LEBA) and clock (CLKAB and
CLKBA) inputs. For A-to-B data flow, the device operates in the transparent
mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB
is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/
flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs
are active. When OEAB is low, the outputs are in the high-impedance state. Data
flow from B to A is similiar to that of A to B but uses OEBA, LEBA, and CLKBA.
The output enables are complementary (OEAB is active high and OEBA is active
low).
The ALVCHR16501 has series resistors in the device output structure which
will significantly reduce reduce line noise when used with light loads. This driver
has been designed to drive ±12mA at the designated threshold levels.
The ALVCHR16501 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
OEAB ¹
CLKAB ⁵⁵
LEAB ²
LEBA ²⁸
CLKBA ³⁰
OEBA ²⁷
3
A1
1D
C1
CLK
1D
C1
CLK
54 _B1
TO 17 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2004 Integrated Device Technology, Inc.
JANUARY 2004
DSC-4613/2