IDT74ALVCH162244 Datasheet, PDF (1/6 Pages) Integrated Device Technology – 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD

IDT74ALVCH162244
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
3.3V CMOS 16-BIT
BUFFER/DRIVER WITH
3-STATE OUTPUTS
AND BUS-HOLD
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH162244
.EATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
DRIVE .EATURES:
• Balanced Output Drivers: ±12mA
• Low switching noise
DESCRIPTION:
This 16-bit buffer/driver is built using advanced dual metal CMOS
technology. The ALVCH162244 is designed specifically to improve the
performance and density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and transmitters. The device can be
used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides
true outputs and symmetrical active-low output-enable (OE) inputs.
The ALVCH162244 has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold
levels.
The ALVCH162244 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
.UNCTIONAL BLOCK DIAGRAM
1OE
1
1A1 ⁴⁷
1A2
46
1A3
44
43
1A4
2
1Y1
3
1Y2
5
1Y3
6
1Y4
25
3OE
3A1
36
3A2
35
3A3
33
32
3A4
13 _3Y1
14 _3Y2
16 _3Y3
17 _3Y4
2OE ⁴⁸
4OE
24
2A1 ⁴¹
8
2Y 1
2A2
40
9
2Y 2
2A3
38
2A4
37
11
2Y 3
12
2Y4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 1999 Integrated Device Technology, Inc.
4A1
30
4A2
29
4A3
27
4A4
26
19 _4Y1
20 _4Y2
22 _4Y3
23 _4Y4
MARCH 1999
DSC-4562/1