IDT72V8985 Datasheet, PDF (1/14 Pages) Integrated Device Technology – 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 256 x 256

3.3 VOLT TIME SLOT INTERCHANGE
DIGITAL SWITCH
256 x 256
IDT72V8985
FEATURES:
• 256 x 256 channel non-blocking switch
• Automatic signal identification (ST-BUS^®, GCI)
• 8 RX inputs—32 channels at 64 Kbit/s per serial line
• 8 TX outputs—32 channels at 64 Kbit/s per serial line
• Three-state serial outputs
• Microprocessor Interface (8-bit data bus)
• Frame Integrity for data applications
• 3.3V Power Supply
• Available in 44-pin Plastic Leaded Chip Carrier (PLCC),
48-pin Small Shrink Outline Package (SSOP), and 44-pin Plastic
Quad Flatpack (PQFP)
• Operating Temperature Range -40°C to +85°C
• 3.3V I/O with 5V Tolerant Inputs
DESCRIPTION:
The IDT72V8985 is a ST-BUS^®/GCI compatible digital switch controlled by
a microprocessor. The IDT72V8985 can handle as many as 256, 64 Kbit/s input
and output channels. Those 256 channels are divided into 8 serial inputs and
outputs, each of which consists of 32 channels. The IDT72V8985 provides per-
channel variable or constant throughput delay modes and microprocessor read
and write access to individual channels. As an important function of a digital
switch is to maintain sequence integrity and minimize throughput delay, the
IDT72V8985 is an ideal solution for most switching needs.
FUNCTIONAL DESCRIPTION
Frame sequence, constant throughput delay, and guaranteed minimum
delay are high priority requirements in today’s integrated data and multimedia
networks. The IDT72V8985 provides these functions on a per-channel basis
using a standard microprocessor control interface. Each of the eight serial lines
is designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data.
In Processor Mode, the microprocessor can access the input and output time
slots to control other devices such as ISDN transceivers and trunk interfaces.
Supporting both GCI and ST-BUS^® formats, IDT72V8985 has incorporated an
internal circuit to automatically identify the polarity and format of the frame
synchronization.
A functional block diagram of the IDT72V8985 device is shown on page 1.
The serial streams operate continuously at 2.048 Mb/s and are arranged in
125µs wide frames each containing 32, 8-bit channels. Eight input (RX0-7) and
eight output (TX0-7) serial streams are provided in the IDT72V8985 device
allowing a complete 256 x 256 channel non-blocking switch matrix to be
constructed. The serial interface clock for the device is 4.096 MHz.
FUNCTIONAL BLOCK DIAGRAM
C4i F0i VCC GND
RESET⁽¹⁾
ODE
RX0
Timing
Unit
Output MUX
RX1
RX2
Receive
RX3
Serial Data
Data
RX4
Streams
Memory
RX5
Control Register
Connection
RX6
Memory
RX7
Microprocessor Interface
DS CS R/W A0/ _DTA D0/
A5
D7
CCO
NOTE:
1. The RESET Input is only provided on the SSOP package.
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The ST-BUS^ is a trademark of Mitel Corp.
1
 2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
TX0
TX1
TX2
Transmit
Serial Data
TX3
Streams
TX4
TX5
TX6
TX7
5707 drw01
AUGUST 2003
DSC-5707/5