IDT72V73250 Datasheet, PDF (1/24 Pages) Integrated Device Technology – 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 8,192 x 8,192

3.3 VOLT TIME SLOT INTERCHANGE
DIGITAL SWITCH
8,192 x 8,192
IDT72V73250
FEATURES:
• 8K x 8K non-blocking switching at 32.768Mb/s
• 16 serial input and output streams
• Accepts single-bit single-data streams at 32.768Mb/s
• Per-channel Variable Delay Mode for low-latency applications
• Per-channel Constant Delay Mode for frame integrity applications
• Automatic identification of ST-BUS^® and GCI bus interfaces
• Automatic frame offset delay measurement
• Per-stream single data frame delay offset programming
• Per-channel high-impedance output control
• Direct microprocessor access to all internal memories
• Memory block programming for quick setup
• IEEE-1149.1 (JTAG) Test Port
• 3.3V Power Supply
• Available in 144-pin (20mm x 20mm) Thin Quad Flatpack (TQFP)
and 144-pin (13mm x 13mm) Plastic Ball Grid Array (PBGA)
• Operating Temperature Range -40°C to +85°C
DESCRIPTION:
The IDT72V73250 has a non-blocking switch capacity of 8,192 x 8,192
channels at 32.768Mb/s. With 16 inputs and 16 outputs, programmable per
stream control, and a variety of operating modes the IDT72V73250 is designed
for the TDM time slot interchange function in either voice or data applications.
Some of the main features of the IDT72V73250 are LOW power 3.3 Volt
operation, automatic ST-BUS^® /GCI sensing, memory block programming,
simple microprocessor interface, JTAG Test Access Port (TAP) and per stream
programmable input offset delay, variable or constant throughput modes, output
enable and processor mode.
The IDT72V73250 is capable of switching up to 8,192 x 8,192 channels
without blocking. Designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data, the
device maintains frame integrity in data applications and minimizes throughput
delay for voice applications on a per-channel basis.
The 16 serial input streams (RX) of the IDT72V73250 are run at 32.768Mb/s
allowing 512 channels per 125µs frame. The data rates on the output streams
(TX) are identical to those on the input streams (RX).
FUNCTIONAL BLOCK DIAGRAM
VCC
GND
RESET
ODE
RX0
RX1
Receive
Serial Data
Streams
RX15
Timing Unit
TX0
Data Memory
MUX
TX1
Internal
Registers
Connection
Memory
Microprocessor Interface
Transmit
Serial Data
Streams
TX7
TX8/OEI0
TX9/OEI1
TX15/OEI7
JTAG Port
C32i F32i FE
DS CS R/W A0-A14
DTA D0-D15
TMS TDI TCK TDO TRST
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IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The ST-BUS^® is a trademark of Mitel Corp.
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 2004 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
JUNE 2004
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