IDT72T51333 Datasheet, PDF (1/55 Pages) Integrated Device Technology – 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits

ADVANCE INFORMATION
2.5V MULTI-QUEUE FLOW-CONTROL DEVICES
(8 QUEUES) 18 BIT WIDE CONFIGURATION
589,824 bits, 1,179,648 bits and 2,359,296 bits
IDT72T51333
IDT72T51343
IDT72T51353
FEATURES:
• Choose from among the following memory density options:
IDT72T51333  Total Available Memory = 589,824 bits
IDT72T51343  Total Available Memory = 1,179,648 bits
IDT72T51353  Total Available Memory = 2,359,296 bits
• Configurable from 1 to 8 Queues
• Queues may be configured at master reset from the pool of
Total Available Memory in blocks of 512 x 18 or 1,024 x 9
• Independent Read and Write access per queue
• User programmable via serial port
• User selectable I/O: 2.5V LVTTL, 1.5V HSTL, 1.8V eHSTL
• Default multi-queue device configurations
-IDT72T51333: 4,096 x 18 x 8Q
-IDT72T51343: 8,192 x 18 x 8Q
-IDT72T51353: 16,384 x 18 x 8Q
• 100% Bus Utilization, Read and Write on every clock cycle
• 200 MHz High speed operation (5ns cycle time)
• 3.6ns access time
• Echo Read Enable & Echo Read Clock Outputs
• Individual, Active queue flags (OV, FF, PAE, PAF)
• 8 bit parallel flag status on both read and write ports
• Provides continuous PAE and PAF status of up to 8 Queues
• Global Bus Matching - (All Queues have same Input Bus Width
and Output Bus Width)
• User Selectable Bus Matching Options:
- x18in to x18out
- x9in to x18out
- x18in to x9out
- x9in to x9out
• FWFT mode of operation on read port
• Partial Reset, clears data in single Queue
• Expansion of up to 8 multi-queue devices in parallel is available
• Power Down Input provides additional power savings in HSTL
and eHSTL modes.
• JTAG Functionality (Boundary Scan)
• Available in a 256-pin PBGA, 1mm pitch, 17mm x 17mm
• HIGH Performance submicron CMOS technology
FUNCTIONAL BLOCK DIAGRAM
MULTI-QUEUE FLOW-CONTROL DEVICE
WADEN
FSTR
WRADD
Q0
6
WEN
WCLK
Din
x9, x18
DATA IN
FF
Q7
PAF
PAFn
8
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
RADEN
ESTR
RDADD
6 _REN
RCLK
EREN
ERCLK
OE
Qout
x9, x18
DATA OUT
OV
PAE
PAEn
8
6113 drw01
NOVEMBER 2003
DSC-6113/2