IDT723612 Datasheet, PDF (1/29 Pages) Integrated Device Technology – BiCMOS SyncBiFIFOO 64 x 36 x 2

BiCMOS SyncBiFIFO™
64 x 36 x 2
IDT723612
Integrated Device Technology, Inc.
FEATURES:
• Free-running CLKA and CLKB can be asynchronous or
coincident (simultaneous reading and writing of data on a
single clock edge is permitted)
• Two independent clocked FIFOs (64 x 36 storage
capacity each) buffering data in opposite directions
• Mailbox bypass Register for each FIFO
• Programmable Almost-Full and Almost-Empty Flags
• Microprocessor interface control logic
• EFA, FFA, AEA, and AFA flags synchronized by CLKA
• EFB, FFB, AEB, and AFB flags synchronized by CLKB
• Passive parity checking on each port
• Parity generation can be selected for each port
FUNCTIONAL BLOCK DIAGRAM
• Low-power advanced BiCMOS technology
• Supports clock frequencies up to 67 MHz
• Fast access times of 10ns
• Available in 132-pin plastic quad flat package (PQF) or
space-saving 120-pin thin quad flat package (TQFP)
• Industrial temperature range (-40oC to +85oC) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT723612 is a monolithic high-speed, low-power
BiCMOS bi-directional clocked FIFO memory. It supports
clock frequencies up to 67 MHz and has read access times as
CLKA
CSA
W/RA
ENA
MBA
Port-A
Control
Logic
RST
ODD/
EVEN
Device
Control
FFA
AFA
36
FS0
FS1
A0 - A35
EFA
AEA
Mail 1
Register
Parity
Gen/Check
64 x 36
SRAM
Write Read
Pointer Pointer
FIFO1
Status Flag
Logic
FIFO2
Programmable Flag
Offset Register
Status Flag
Logic
Read Write
Pointer Pointer
MBF1
PEFB
PGB
36
EFB
AEB
B0 - B36
FFB
AFB
36
64 x 36
SRAM
PGA
PEFA
MBF2
Parity
Gen/Check
Mail 2
Register
Port-B
Control
Logic
CLKB
CSB
W/RB
ENB
MBB
The IDT logo is a registered trademark and Sync BiFIFO is a trademark of Integrated Device Technology Inc.
COMMERCIAL TEMPERATURE RANGE
©1997 Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
3136 drw 01
MAY 1997
DSC-3136/4
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