IDT71V321S_15 Datasheet, PDF (1/15 Pages) Integrated Device Technology – HIGH SPEED 3.3V 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS

HIGH SPEED 3.3V
2K X 8 DUAL-PORT
STATIC RAM WITH
INTERRUPTS
IDT71V321S/L
Features
◆ _{High-speed access}
– Commercial & Industrial: 25/35/55ns (max.)
◆ _{Low-power operation}
– IDT71V321S
— Active: 325mW (typ.)
— Standby: 5mW (typ.)
– IDT71V321L
— Active: 325mW (typ.)
— Standby: 1mW (typ.)
◆ _{Two INT flags for port-to-port communications}
◆ _{On-chip port arbitration logic (IDT71V321 only)}
◆ _{BUSY output flag}
◆ _{Fully asynchronous operation from either port}
◆ _{Battery backup operation—2V data retention (L only)}
◆ _{TTL-compatible, single 3.3V power supply}
◆ _{Available in 52-pin PLCC, 64-pin TQFP and STQFP}
packages
◆ _{Industrial temperature range (–40°C to +85°C) is available}
for selected speeds
◆ _{Green parts available, see ordering information}
Functional Block Diagram
OEL
CEL
R/WL
OER
CER
R/WR
I/O0L- I/O7L
BUSYL^(1,2)
A10L
A0L
I/O
Control
I/O
Control
Address
Decoder
11
CEL
OEL
R/WL
MEMORY
ARRAY
ARBITRATION
and
INTERRUPT
LOGIC
Address
Decoder
11
CER
OER
R/WR
INTL⁽²⁾
NOTES:
1. IDT71V321 (MASTER): BUSY is an output
2. BUSYandINTaretotem-poleoutputs.
I/O0R-I/O7R
BUSYR^(1,2)
A10R
A0R
INTR⁽²⁾
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©2015 Integrated Device Technology, Inc.
OCTOBER 2015
DSC-3026/12