IDT71V30 Datasheet, PDF (1/14 Pages) Integrated Device Technology – HIGH-SPEED 3.3V 1K X 8 DUAL-PORT STATIC RAM

HIGH-SPEED 3.3V
1K X 8 DUAL-PORT
STATIC RAM
IDT71V30S/L
Features
x _{High-speed access}
– Commercial: 25/35/55ns (max.)
x _{Low-power operation}
– IDT71V30S
— Active: 375mW (typ.)
— Standby: 5mW (typ.)
– IDT71V30L
— Active: 375mW (typ.)
— Standby: 1mW (typ.)
x _{On-chip port arbitration logic}
x _{Interrupt flags for port-to-port communication}
x _{Fully asynchronous operation from either port}
x _{Battery backup operation, 2V data retention (L Only)}
x _{TTL-compatible, single 3.3V ±0.3V power supply}
x _{Industrial temperature range (-40}O_{C to +85}O_{C) is available}
for selected speeds
Functional Block Diagram
OEL
CEL
R/WL
OER
CER
R/WR
I/O0L- I/O7L
BUSYL⁽¹⁾
A9L
A0L
I/O
Control
I/O
Control
Address
Decoder
10
CEL
OEL
R/WL
MEMORY
ARRAY
ARBITRATION
and
INTERRUPT
LOGIC
Address
Decoder
10
CER
OER
R/WR
INTL⁽²⁾
NOTES:
1. IDT71V30: BUSY outputs are non-tristatable push-pulls.
2. INT outputs are non-tristable push-pull output structure.
I/O0R-I/O7R
BUSYR⁽¹⁾
A9R
A0R
INTR⁽²⁾
3741 drw 01
1
©2000 Integrated Device Technology, Inc.
JANUARY 2001
DSC 3741/7