IDT70V9279S Datasheet, PDF (1/19 Pages) Integrated Device Technology – HIGH-SPEED 3.3V 32K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM

HIGH-SPEED 3.3V
32/16K x 16
SYNCHRONOUS
DUAL-PORT STATIC RAM
IDT70V9279/69S/L
Features:
◆ _{True Dual-Ported memory cells which allow simultaneous}
access of the same memory location
◆ _{High-speed clock to data access}
– Commercial: 6.5/7.5/9/12/15ns (max.)
– Industrial: 7.5ns (max.)
◆ _{Low-power operation}
– IDT70V9279/69S
Active: 429mW (typ.)
Standby: 3.3mW (typ.)
– IDT70V9279/69L
Active: 429mW (typ.)
Standby: 1.32mW (typ.)
◆ _{Flow-through or Pipelined output mode on either port via}
the FT/PIPE pin
◆ _{Counter enable and reset features}
◆ _{Dual chip enables allow for depth expansion without}
additional logic
◆ _{Full synchronous operation on both ports}
– 4ns setup to clock and 1ns hold on all control, data,
and address inputs
– Data input, address, and control registers
– Fast 6.5ns clock to data out in the Pipelined output mode
– Self-timed write allows fast cycle time
– 10ns cycle time, 100MHz operation in Pipelined output mode
◆ _{Separate upper-byte and lower-byte controls for}
multiplexed bus and bus matching compatibility
◆ _{LVTTL- compatible, single 3.3V (±0.3V) power supply}
◆ _{Industrial temperature range (–40°C to +85°C) is}
available for selected speeds
◆ _{Available in a 128-pin Thin Quad Flatpack (TQFP) package}
Functional Block Diagram
R/WL
UBL
CE0L
CE1L
1
0
0/1
LBL
OEL
FT/PIPEL
I/O8L-I/O15L
0/1 1b 0bb a ^{1a 0a}
I/O0L-I/O7L
A14L⁽¹⁾
A0L
CLKL
ADSL
CNTENL
CNTRSTL
NOTE:
1. A14X is a NC for IDT70V9269.
Counter/
Address
Reg.
I/O
Control
I/O
Control
MEMORY
ARRAY
R/WR
UBR
CE0R
1
0
CE1R
0/1
LBR
OER
0a 1a
a
b0b ^1b
0/1
Counter/
Address
Reg.
FT/PIPER
,
I/O8R-I/O15R
I/O0R-I/O7R
A14R⁽¹⁾
A0R
CLKR
ADSR
CNTENR
CNTRSTR
3743 drw 01
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©2004 Integrated Device Technology, Inc.
MAY 2004
DSC 3743/8