IDT7054S Datasheet, PDF (1/11 Pages) Integrated Device Technology – HIGH-SPEED 4K x 8 FourPort STATIC RAM

HIGH-SPEED
4K x 8 FourPort^TM
STATIC RAM
IDT7054S/L
.eatures
x _{High-speed access}
– Commercial: 20/25/35ns (max.)
– Industrial: 25ns (max.)
– Military: 25/35ns (max.)
x _{Low-power operation}
– IDT7054S
Active: 750mW (typ.)
Standby: 7.5mW (typ.)
– IDT7054L
Active: 750mW (typ.)
Standby: 1.5mW (typ.)
x _{True FourPort memory cells which allow simultaneous}
access of the same memory locations
x _{Fully asynchronous operation from each of the four ports:}
P1, P2, P3, and P4
x _{TTL-compatible; single 5V (±10%) power supply}
x _{Available in 128 pin Thin Quad Flatpack and 108 pin PGA}
packages
x _{Industrial temperature range (–40°C to +85°C) is available}
for selected speeds
Description
The IDT7054 is a high-speed 4K x 8 FourPort™ Static RAM designed
to be used in systems where multiple access into a common RAM is
required. This FourPort Static RAM offers increased system performance
in multiprocessor systems that have a need to communicate in real time and
also offers added benefit for high-speed systems in which multiple access
is required in the same cycle.
The IDT7054 is also designed to be used in systems where on-chip
hardware port arbitration is not needed. This part lends itself to those
systems which cannot tolerate wait states or are designed to be able to
.unctional Block Diagram
R/WP1
CEP1
OEP1
I/O0P1-I/O7P1
COLUMN
I/O
COLUMN
I/O
R/WP4
CEP4
OEP4
I/O0P4-I/O7P4
A0P1 - A11P1
A0P2 - A11P2
PORT 1
ADDRESS
DECODE
LOGIC
PORT 2
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
PORT 4
ADDRESS
DECODE
LOGIC
PORT 3
ADDRESS
DECODE
LOGIC
A0P4 - A11P4
A0P3 - A11P3
I/O0P2-I/O7P2
OEP2
CEP2
R/WP2
©2001 Integrated Device Technology, Inc.
COLUMN
I/O
COLUMN
I/O
1
I/O0P3-I/O7P3
OEP3
CEP3
R/WP3
3241 drw 01
NOVEMBER 2001
DSC 3241/11