IDT7014S Datasheet, PDF (1/9 Pages) Integrated Device Technology – HIGH-SPEED 4K x 9DUAL-PORT STATIC RAM

HIGH-SPEED
4K x 9DUAL-PORT
STATIC RAM
IDT7014S
Features:
x _{True Dual-Ported memory cells which allow simultaneous}
reads of the same memory location
x _{High-speed access}
– Commercial: 12/15/20/25ns (max.)
– Industrial: 15/20/25ns (max.)
x _{Standard-power operation}
– IDT7014S
Active: 750mW (typ.)
x _{Fully asynchronous operation from either port}
x _{TTL-compatible; single 5V (±10%) power supply}
x _{Available in 52-pin PLCC and a 64-pin TQFP}
x _{Industrial temperature range (–40°C to +85°C) is available}
for selected speeds
Description:
The IDT7014 is a high-speed 4K x 9 Dual-Port Static RAM designed
to be used in systems where on-chip hardware port arbitration is not
needed. This part lends itself to high-speed applications which do not rely
on BUSY signals to manage simultaneous access.
The IDT7014 provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. See functional description.
The IDT7014 utilitizes a 9-bit wide data path to allow for parity at the
user's option. This feature is especially useful in data communication
applications where it is necessary to use a parity bit for transmission/
reception error checking.
Fabricated using IDT’s high-performance technology, these Dual-
Ports typically operate on only 750mW of power at maximum access times
as fast as 12ns.
The IDT7014 is packaged in a 52-pin PLCC and a 64-pin thin quad
flatpack, (TQFP).
Functional Block Diagram
R/WL
R/WR
OEL
I/O0L- I/O8L
I/O
CONTROL
I/O
CONTROL
OER
I/O0R- I/O8R
A0L- A11L
ADDRESS
DECODER
MEMORY
ARRAY
ADDRESS
DECODER
A0R- A11R
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©2000 Integrated Device Technology, Inc.
MARCH 2000
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