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IDT5V925BI Datasheet, PDF (1/18 Pages) Integrated Device Technology – Programmable LVCMOS/LVTTL Clock Generator
Programmable LVCMOS/LVTTL
Clock Generator
IDT5V925BI
DATA SHEET
General Description
The IDT5V925BI is a high-performance, low skew, low jitter
phase-locked loop (PLL) clock driver. It provides precise phase and
frequency alignment of its clock outputs to an externally applied
clock input or internal crystal oscillator. The IDT5V925BI has been
specially designed to interface with Gigabit Ethernet and Fast
Ethernet applications by providing a 125MHz clock from 25MHz
input. It can also be programmed to provide output frequencies
ranging from 3.125MHz to 160MHz with input frequencies ranging
from 3.125MHz to 80MHz.
The IDT5V925BI includes an internal RC filter that provides
excellent jitter characteristics and eliminates the need for external
components. When using the optional crystal input, the chip accepts
a 10-30MHz fundamental mode crystal with a maximum equivalent
series resistance of 50Ω. The on-chip crystal oscillator includes the
feedback resistor and crystal capacitors (nominal load capacitance
is 18pF).
Applications
• Ethernet/fast ethernet
• Router
• Network switches
• SAN
• Instrumentation
Block Diagram
Features
• 3V to 3.6V operating voltage
• 3.125MHz to 160MHz output frequency range
• Four programmable frequency LVCMOS/LVTTL outputs
• Input from fundamental crystal oscillator or external source
• Balanced drive outputs ±12mA
• PLL disable mode for low frequency testing
• Select inputs (S[1:0]) for divide selection (multiply ratio of 2, 3, 4,
5, 6, 7 and 8)
• 5V tolerant inputs
• Low output skew/jitter
• External PLL feedback, internal loop filter
• -40°C to 85°C ambient operating temperature
• Available in Lead-free (RoHS 6) package
Pin Assignment
S1 1
S0 2
GNDQ 3
VDDQ 4
X1 5
X2 6
CLKIN 7
FB 8
16 VDD
15 GND
14 Q2
13 Q1
12 Q0
11 Q/N
10 GND
9 OE
IDT5V925BI
16 LEAD QSOP
0.194” x 0.236” x 0.058” package body
Q Package
Top View
S0 S1
FB
CLKIN
PHASE
DETECTOR
X2
X1
OPTIONAL
CRYSTAL
XTAL
OSC
LOOP
FILTER
IDT5V925BQGI REVISION B JANUARY 21, 2011
VCO
0
1
1
SELECT
MODE
VCO
DIVIDE
Q/N
1/N
Q0
Q1
Q2
OE
©2011 Integrated Device Technology, Inc.